From: Nikolaus Voss <nv@vosn.de>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Alexander Stein <alexander.stein@ew.tq-group.com>,
Liu Ying <victor.liu@nxp.com>,
Luca Ceresoli <luca.ceresoli@bootlin.com>,
Fabio Estevam <festevam@denx.de>, Marek Vasut <marex@denx.de>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
nikolaus.voss@haag-streit.com, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] drm: bridge: fsl-ldb: fixup mode on freq mismatch
Date: Sat, 07 Dec 2024 07:30:27 +0100 [thread overview]
Message-ID: <bb14f0aca5d14141b45700abf10deb61@vosn.de> (raw)
In-Reply-To: <87zfl8oqeg.fsf@bootlin.com>
Hi Miquèl,
On 06.12.2024 15:08, Miquel Raynal wrote:
> On 03/12/2024 at 20:09:52 +01, Nikolaus Voss <nv@vosn.de> wrote:
>
>> LDB clock has to be a fixed multiple of the pixel clock.
>
> Not only, IIUC it also needs to be synchronized, ie. share the same
> source.
>
>> As LDB and pixel clock are derived from different clock sources
>> (at least on imx8mp),
>
> Wait, what? I am sorry but that is not at all recommended, both should
> come from video_pll1 which the de-facto versatile PLL to use, no? Am I
> missing something here?
No, I was wrong :-). I've corrected the log text in the v3.
--
Nikolaus Voss
prev parent reply other threads:[~2024-12-07 6:30 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-03 19:09 Nikolaus Voss
2024-12-03 20:15 ` Marek Vasut
2024-12-04 10:40 ` Nikolaus Voss
2024-12-07 11:46 ` Marek Vasut
2024-12-09 9:27 ` Nikolaus Voss
2024-12-09 21:51 ` Marek Vasut
2024-12-11 16:47 ` Nikolaus Voss
2024-12-04 12:48 ` kernel test robot
2024-12-04 22:03 ` kernel test robot
2024-12-06 14:08 ` Miquel Raynal
2024-12-07 6:30 ` Nikolaus Voss [this message]
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