Re: [PATCH v3] coresight: etm3x: Fix cntr_val_show() to match cntr_val_store() behavior

[Suzuki K Poulose <suzuki.poulose@arm.com>]

Hello

On 02/02/2026 05:09, Kuan-Wei Chiu wrote:
> On Tue, Dec 02, 2025 at 09:26:19AM +0000, James Clark wrote:
>>
>>
>> On 02/12/2025 8:26 am, Kuan-Wei Chiu wrote:
>>> The cntr_val_show() function was intended to print the values of all
>>> counters using a loop. However, due to a buffer overwrite issue with
>>> sprintf(), it effectively only displayed the value of the last counter.
>>>
>>> The companion function, cntr_val_store(), allows users to modify a
>>> specific counter selected by 'cntr_idx'. To maintain consistency
>>> between read and write operations and to align with the ETM4x driver
>>> behavior, modify cntr_val_show() to report only the value of the
>>> currently selected counter.
>>>
>>> This change removes the loop and the "counter %d:" prefix, printing
>>> only the hexadecimal value. It also adopts sysfs_emit() for standard
>>> sysfs output formatting.
>>>
>>> Fixes: a939fc5a71ad ("coresight-etm: add CoreSight ETM/PTM driver")
>>> Cc: stable@vger.kernel.org
>>> Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
>>> ---
>>> Build test only.
>>>
>>> Changes in v3:
>>> - Switch format specifier to %#x to include the 0x prefix.
>>> - Add Cc stable
>>>
>>> v2: https://lore.kernel.org/lkml/20251201095228.1905489-1-visitorckw@gmail.com/
>>>
>>>    .../hwtracing/coresight/coresight-etm3x-sysfs.c   | 15 ++++-----------
>>>    1 file changed, 4 insertions(+), 11 deletions(-)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
>>> index 762109307b86..b3c67e96a82a 100644
>>> --- a/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
>>> +++ b/drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
>>> @@ -717,26 +717,19 @@ static DEVICE_ATTR_RW(cntr_rld_event);
>>>    static ssize_t cntr_val_show(struct device *dev,
>>>    			     struct device_attribute *attr, char *buf)
>>>    {
>>> -	int i, ret = 0;
>>>    	u32 val;
>>>    	struct etm_drvdata *drvdata = dev_get_drvdata(dev->parent);
>>>    	struct etm_config *config = &drvdata->config;
>>>    	if (!coresight_get_mode(drvdata->csdev)) {
>>>    		spin_lock(&drvdata->spinlock);
>>> -		for (i = 0; i < drvdata->nr_cntr; i++)
>>> -			ret += sprintf(buf, "counter %d: %x\n",
>>> -				       i, config->cntr_val[i]);
>>> +		val = config->cntr_val[config->cntr_idx];
>>>    		spin_unlock(&drvdata->spinlock);
>>> -		return ret;
>>> -	}
>>> -
>>> -	for (i = 0; i < drvdata->nr_cntr; i++) {
>>> -		val = etm_readl(drvdata, ETMCNTVRn(i));
>>> -		ret += sprintf(buf, "counter %d: %x\n", i, val);
>>> +	} else {
>>> +		val = etm_readl(drvdata, ETMCNTVRn(config->cntr_idx));
>>>    	}
>>> -	return ret;
>>> +	return sysfs_emit(buf, "%#x\n", val);
>>>    }
>>>    static ssize_t cntr_val_store(struct device *dev,
>>
>> Reviewed-by: James Clark <james.clark@linaro.org>
>>
> Thanks for the review!
> Is there anything else I need to do for this fix to land?

Thanks for the patch, I will queue this for the next release (v7.1).

Suzuki

> 
> Regards,
> Kuan-Wei
>