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Fri, 06 Jan 2023 01:31:59 -0800 (PST) Received: from [192.168.1.102] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id iv14-20020a05600c548e00b003b47b80cec3sm6203606wmb.42.2023.01.06.01.31.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 Jan 2023 01:31:58 -0800 (PST) Message-ID: Date: Fri, 6 Jan 2023 10:31:56 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 1/3] dt-bindings: clock: document SM8550 DISPCC clock controller Content-Language: en-US To: Neil Armstrong , Bjorn Andersson , Andy Gross , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230103-topic-sm8550-upstream-dispcc-v1-0-81bfcc26b2dc@linaro.org> <20230103-topic-sm8550-upstream-dispcc-v1-1-81bfcc26b2dc@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230103-topic-sm8550-upstream-dispcc-v1-1-81bfcc26b2dc@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03/01/2023 14:53, Neil Armstrong wrote: > Document device tree bindings for display clock controller for > Qualcomm SM8550 SoC. > > Signed-off-by: Neil Armstrong > --- > .../bindings/clock/qcom,sm8550-dispcc.yaml | 106 +++++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8550-dispcc.h | 101 ++++++++++++++++++++ > 2 files changed, 207 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml > new file mode 100644 > index 000000000000..06c04656cb55 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml > @@ -0,0 +1,106 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Display Clock & Reset Controller for SM8550 > + > +maintainers: > + - Bjorn Andersson > + - Neil Armstrong > + > +description: | > + Qualcomm display clock control module provides the clocks, resets and power > + domains on SM8550. > + > + See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h > + > +properties: > + compatible: > + enum: > + - qcom,sm8550-dispcc > + > + clocks: > + minItems: 3 Clock inputs should be optional if we can really treat them optional, e.g. reparent to something else or just adjust list of parents. Since the driver has fixed parent data, it suggests these are not really optional and they are all in the hardware (always). Best regards, Krzysztof