From: Jon Hunter <jonathanh@nvidia.com>
To: Sandipan Patra <spatra@nvidia.com>, <treding@nvidia.com>
Cc: <bbasu@nvidia.com>, <kyarlagadda@nvidia.com>, <snikam@nvidia.com>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH V2] soc/tegra: Add defines for Tegra186+ chip IDs
Date: Fri, 26 Jun 2020 13:21:49 +0100 [thread overview]
Message-ID: <bb9ae015-4fe8-59d4-48fd-6a99a7ae8bc9@nvidia.com> (raw)
In-Reply-To: <1593171922-30632-1-git-send-email-spatra@nvidia.com>
On 26/06/2020 12:45, Sandipan Patra wrote:
> Add the chip IDs for NVIDIA Tegra186, Tegra194 and Tegra234
> SoC families.
>
> Signed-off-by: Sandipan Patra <spatra@nvidia.com>
> ---
> V2:
> - Precise commit message
>
> include/soc/tegra/fuse.h | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
> index 252ea20..4a5236b 100644
> --- a/include/soc/tegra/fuse.h
> +++ b/include/soc/tegra/fuse.h
> @@ -1,6 +1,6 @@
> /* SPDX-License-Identifier: GPL-2.0-only */
> /*
> - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
> + * Copyright (c) 2012-2020, NVIDIA CORPORATION. All rights reserved.
> */
>
> #ifndef __SOC_TEGRA_FUSE_H__
> @@ -12,6 +12,9 @@
> #define TEGRA124 0x40
> #define TEGRA132 0x13
> #define TEGRA210 0x21
> +#define TEGRA186 0x18
> +#define TEGRA194 0x19
> +#define TEGRA234 0x23
>
> #define TEGRA_FUSE_SKU_CALIB_0 0xf0
> #define TEGRA30_FUSE_SATA_CALIB 0x124
Thanks. Looks good to me.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Jon
--
nvpublic
prev parent reply other threads:[~2020-06-26 12:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 11:45 Sandipan Patra
2020-06-26 12:21 ` Jon Hunter [this message]
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