From: Vidya Sagar <vidyas@nvidia.com>
To: Bjorn Helgaas <helgaas@kernel.org>, <lorenzo.pieralisi@arm.com>
Cc: <robh+dt@kernel.org>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <andrew.murray@arm.com>, <kishon@ti.com>,
<gustavo.pimentel@synopsys.com>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194
Date: Tue, 31 Mar 2020 08:25:08 +0530 [thread overview]
Message-ID: <bba72560-85cc-b59b-b0e8-bfc7c7408736@nvidia.com> (raw)
In-Reply-To: <20200330214721.GA128269@google.com>
On 3/31/2020 3:17 AM, Bjorn Helgaas wrote:
> External email: Use caution opening links or attachments
>
>
> On Tue, Mar 03, 2020 at 11:40:52PM +0530, Vidya Sagar wrote:
>> Add support for the endpoint mode of Synopsys DesignWare core based
>> dual mode PCIe controllers present in Tegra194 SoC.
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> Acked-by: Thierry Reding <treding@nvidia.com>
>> ---
>> V5:
>> * Added Acked-by: Thierry Reding <treding@nvidia.com>
>> * Removed unwanted header file inclusion
>>
>> V4:
>> * Addressed Lorenzo's review comments
>> * Started using threaded irqs instead of kthreads
>>
>> V3:
>> * Addressed Thierry's review comments
>>
>> V2:
>> * Addressed Bjorn's review comments
>> * Made changes as part of addressing review comments for other patches
>>
>> drivers/pci/controller/dwc/Kconfig | 30 +-
>> drivers/pci/controller/dwc/pcie-tegra194.c | 679 ++++++++++++++++++++-
>> 2 files changed, 691 insertions(+), 18 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
>> index 0830dfcfa43a..169cde58dd92 100644
>> --- a/drivers/pci/controller/dwc/Kconfig
>> +++ b/drivers/pci/controller/dwc/Kconfig
>> @@ -248,14 +248,38 @@ config PCI_MESON
>> implement the driver.
>>
>> config PCIE_TEGRA194
>> - tristate "NVIDIA Tegra194 (and later) PCIe controller"
>> + tristate
>> +
>> +config PCIE_TEGRA194_HOST
>> + tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
>> depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
>> depends on PCI_MSI_IRQ_DOMAIN
>> select PCIE_DW_HOST
>> select PHY_TEGRA194_P2U
>> + select PCIE_TEGRA194
>> + default y
>
> Sorry I missed this before, but why is this "default y"? From
> Documentation/kbuild/kconfig-language.rst:
>
> The default value deliberately defaults to 'n' in order to avoid
> bloating the build. With few exceptions, new config options should
> not change this. The intent is for "make oldconfig" to add as little
> as possible to the config from release to release.
>
> I do see that several other things in other drivers/pci/ Kconfig files
> are also "default y", and we should probably change some of them. But
> I don't want to add even more unless there's a good reason.
>
> I'm not looking for more reactions like these:
>
> https://lore.kernel.org/r/CAHk-=wiZ24JuVehJ5sEC0UG1Gk2nvB363wO02RRsR1oEht6R9Q@mail.gmail.com
> https://lore.kernel.org/r/CA+55aFzPpuHU1Nqd595SEQS=F+kXMzPs0Rba9FUgTodGxmXsgg@mail.gmail.com
>
> Can you please update this patch to either remove the "default y" or
> add the rationale for keeping it?
I'm fine with removing 'default y' line.
Should I send a patch only with this change?
Thanks,
Vidya Sagar
>
>> + help
>> + Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
>> + work in host mode. There are two instances of PCIe controllers in
>> + Tegra194. This controller can work either as EP or RC. In order to
>> + enable host-specific features PCIE_TEGRA194_HOST must be selected and
>> + in order to enable device-specific features PCIE_TEGRA194_EP must be
>> + selected. This uses the DesignWare core.
next prev parent reply other threads:[~2020-03-31 2:55 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-03 18:10 [PATCH V5 0/5] " Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 1/5] soc/tegra: bpmp: Update ABI header Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 2/5] dt-bindings: PCI: tegra: Add DT support for PCIe EP nodes in Tegra194 Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 3/5] arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194 Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 4/5] arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform Vidya Sagar
2020-03-03 18:10 ` [PATCH V5 5/5] PCI: tegra: Add support for PCIe endpoint mode in Tegra194 Vidya Sagar
2020-03-22 14:50 ` Guenter Roeck
2020-03-22 17:15 ` Vidya Sagar
2020-03-30 21:47 ` Bjorn Helgaas
2020-03-31 2:55 ` Vidya Sagar [this message]
2020-03-31 3:00 ` Bjorn Helgaas
2020-03-31 8:23 ` Lorenzo Pieralisi
2020-03-31 15:25 ` Bjorn Helgaas
2020-03-11 10:52 ` [PATCH V5 0/5] " Lorenzo Pieralisi
2020-03-11 14:30 ` Thierry Reding
2020-03-11 15:48 ` Vidya Sagar
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