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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Akash Asthana <akashast@codeaurora.org>,
	Matthias Kaehlcke <mka@chromium.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>
Cc: mukesh.savaliya@oss.qualcomm.com, linux-arm-msm@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH 1/2] soc: qcom: geni-se: Correct QUP Core ICC vote constants
Date: Wed, 9 Sep 2026 13:42:28 +0200	[thread overview]
Message-ID: <bc2112d9-4085-42be-807a-2242a1c510fb@oss.qualcomm.com> (raw)
In-Reply-To: <20260909-correct-icc-bandwidth-vote-constants-v1-1-fbebf6b3c341@oss.qualcomm.com>

On 9/8/26 9:05 PM, Viken Dadhaniya wrote:
> The GENI_TO_CORE ("qup-core") ICC vote selects the QUP Core 2X clock
> rate. The CORE_2X_*_MHZ constants are expressed in Bps, but their
> values are several orders of magnitude too small. For example, the
> 50 MHz threshold is represented by 2500 rather than 25000000 Bps.

[...]

>  /*
> - * Define bandwidth thresholds that cause the underlying Core 2X interconnect
> - * clock to run at the named frequency. These baseline values are recommended
> - * by the hardware team, and are not dynamically scaled with GENI bandwidth
> - * beyond basic on/off.
> + * ICC bandwidth values in Bps for the GENI_TO_CORE ("qup-core") path.
> + * Convert them with Bps_to_icc() before setting avg_bw. The QUP ICC provider
> + * maps each threshold to the Core 2X rate named by the macro suffix.
> + *
> + * These values are core clock votes, not GENI transfer bandwidths.
>   */
> -#define CORE_2X_19_2_MHZ		960
> -#define CORE_2X_50_MHZ			2500
> -#define CORE_2X_100_MHZ			5000
> -#define CORE_2X_150_MHZ			7500
> -#define CORE_2X_200_MHZ			10000
> -#define CORE_2X_236_MHZ			16383
> +#define CORE_2X_19_2_MHZ		9600000
> +#define CORE_2X_50_MHZ			25000000
> +#define CORE_2X_100_MHZ			50000000
> +#define CORE_2X_150_MHZ			75000000
> +#define CORE_2X_200_MHZ			100000000
> +#define CORE_2X_236_MHZ			118000000

Today, even with patch 2 applied, many of these rates are unused.
Are we going to?

Is there any logic we could apply to derive them?

Konrad

  reply	other threads:[~2026-09-09 11:42 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-08 19:05 [PATCH 0/2] qcom-geni: Fix QUP Core ICC votes Viken Dadhaniya
2026-09-08 19:05 ` [PATCH 1/2] soc: qcom: geni-se: Correct QUP Core ICC vote constants Viken Dadhaniya
2026-09-09 11:42   ` Konrad Dybcio [this message]
2026-09-13  8:42     ` Viken Dadhaniya
2026-09-08 19:05 ` [PATCH 2/2] tty: serial: qcom_geni_serial: Keep console RX functional after deep idle Viken Dadhaniya
2026-09-09 11:44   ` Konrad Dybcio

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