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From: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
To: Steven Price <steven.price@arm.com>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Cc: boris.brezillon@collabora.com, robh@kernel.org,
	maarten.lankhorst@linux.intel.com, mripard@kernel.org,
	tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch
Subject: Re: [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table
Date: Mon, 10 Mar 2025 12:46:01 -0300	[thread overview]
Message-ID: <bc587831-97b2-4991-9d5e-71e6962c63a1@collabora.com> (raw)
In-Reply-To: <6cdaafa2-68f9-4d5b-abe5-5c9c549e3c6e@arm.com>

Hi Steven,

On 2/27/25 11:44 AM, Steven Price wrote:
> On 26/02/2025 18:30, Ariel D'Alessandro wrote:
>> Bifrost MMUs support AArch64 4kB granule specification. However,
>> panfrost only enables MMU in legacy mode, despite the presence of the
>> HW_FEATURE_AARCH64_MMU feature flag.
>>
>> This commit adds support to use page tables according to AArch64 4kB
>> granule specification. This feature is enabled conditionally based on
>> the GPU model's HW_FEATURE_AARCH64_MMU feature flag.
>>
>> Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
> 
> I find some of the naming confusing here. The subject calls it
> 'ARM_64_LPAE_S1' which in an unfortunate name from the iommu code.
> 
> AIUI, LPAE is the "Large Physical Address Extension" and is a v7 feature
> for 32 bit. "LEGACY" (as Bifrost calls it) mode is a (modified) version
> of LPAE, which in Linux we've called "mali_lpae".
> 
> What you're adding support for is AARCH64_4K which is the v8 64 bit
> mode. So I think it's worth including the "64" part of the name of the
> mmu_lpae_s1_enable() function. Personally I'd be tempted to drop the
> "_s1" part, but I guess there's a small chance someone will find a use
> for the second stage one day.

Yes, overall agreed. I'll definitely keep the "64_4k" part of the name 
explicit and also keep the "mali_lpae" for the legacy mode. Will send a 
patchset v1 soon with all this, we can continue reviewing it there.

> 
> Note also that it's not necessarily a clear-cut improvement to use
> AARCH64_4K over LEGACY. I wouldn't be surprised if this actually causes
> (minor) performance regressions on some platforms. Sadly I don't have
> access to a range of hardware to test this on.

FWIW, I'm using Mesa CI [0] to test this as much as possible, at least 
to detect any (major) regressions. As proposed by Boris, we should use a 
property to progressively enable this feature.

Thanks!

[0] https://gitlab.freedesktop.org/mesa/mesa/

-- 
Ariel D'Alessandro
Software Engineer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK 
Registered in England & Wales, no. 5513718


  reply	other threads:[~2025-03-10 15:46 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-26 18:30 [RFC PATCH 0/4] " Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 1/4] drm/panfrost: Use GPU_MMU_FEATURES_VA_BITS/PA_BITS macros Ariel D'Alessandro
2025-02-27  8:21   ` Boris Brezillon
2025-02-27 14:44   ` Steven Price
2025-02-26 18:30 ` [RFC PATCH 2/4] drm/panfrost: Split LPAE MMU TRANSTAB register values Ariel D'Alessandro
2025-02-27  8:25   ` Boris Brezillon
2025-03-07 14:02     ` Ariel D'Alessandro
2025-02-26 18:30 ` [RFC PATCH 3/4] drm/panfrost: Support ARM_64_LPAE_S1 page table Ariel D'Alessandro
2025-02-27  8:30   ` Boris Brezillon
2025-02-27  8:32     ` Boris Brezillon
2025-03-07 14:42     ` Ariel D'Alessandro
2025-02-27 14:44   ` Steven Price
2025-03-10 15:46     ` Ariel D'Alessandro [this message]
2025-02-27 14:55   ` Boris Brezillon
2025-03-10 15:34     ` Ariel D'Alessandro
2025-03-10 19:25       ` Boris Brezillon
2025-02-26 18:30 ` [RFC PATCH 4/4] drm/panfrost: Set HW_FEATURE_AARCH64_MMU feature flag on Bifrost models Ariel D'Alessandro

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