From: Mukesh Savaliya <mukesh.savaliya@oss.qualcomm.com>
To: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
Vinod Koul <vkoul@kernel.org>, Jonathan Corbet <corbet@lwn.net>,
Thara Gopinath <thara.gopinath@gmail.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Udit Tiwari <quic_utiwari@quicinc.com>,
Md Sadre Alam <mdalam@qti.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Stephan Gerhold <stephan.gerhold@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Peter Ujfalusi <peter.ujfalusi@gmail.com>,
Michal Simek <michal.simek@amd.com>,
Frank Li <Frank.Li@kernel.org>,
Andy Gross <agross@codeaurora.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-crypto@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, brgl@kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH v23 06/14] dmaengine: qcom: bam_dma: add support for BAM locking
Date: Tue, 21 Jul 2026 23:37:21 +0530 [thread overview]
Message-ID: <bc7854a8-1dd4-4e0a-83bd-a8c9dd95645d@oss.qualcomm.com> (raw)
In-Reply-To: <20260721-qcom-qce-cmd-descr-v23-6-1be02deffda9@oss.qualcomm.com>
Hi Bartosz,
On 7/21/2026 7:03 PM, Bartosz Golaszewski wrote:
[...]
> @@ -676,13 +691,26 @@ static void bam_free_chan(struct dma_chan *chan)
> static int bam_slave_config(struct dma_chan *chan,
> struct dma_slave_config *cfg)
> {
> + struct bam_config *peripheral_cfg = cfg->peripheral_config;
> struct bam_chan *bchan = to_bam_chan(chan);
> + const struct bam_device_data *bdata = bchan->bdev->dev_data;
>
> guard(spinlock_irqsave)(&bchan->vc.lock);
>
> memcpy(&bchan->slave, cfg, sizeof(*cfg));
> bchan->reconfigure = 1;
>
> + /*
> + * This is required to setup the pipe locking and must be done even
> + * before the first call to bam_start_dma().
> + */
> + if (bdata->pipe_lock_supported && peripheral_cfg) {
> + if (cfg->direction != DMA_MEM_TO_DEV)
> + return -EINVAL;
> +
> + bchan->lock_scratchpad_addr = peripheral_cfg->lock_scratchpad_addr;
IIUC, peripheral_cfg will be filled by the client driver of BAM right ?
if not, who actually passes it ?
> + }
> +
> return 0;
> }
>
> @@ -802,6 +830,7 @@ static int bam_dma_terminate_all(struct dma_chan *chan)
> }
[...]
> static void bam_start_dma(struct bam_chan *bchan)
> {
> - struct virt_dma_desc *vd = vchan_next_desc(&bchan->vc);
> + struct virt_dma_desc *vd;
> struct bam_device *bdev = bchan->bdev;
> struct bam_async_desc *async_desc = NULL;
> struct bam_desc_hw *desc;
> @@ -1064,6 +1197,7 @@ static void bam_start_dma(struct bam_chan *bchan)
>
> lockdep_assert_held(&bchan->vc.lock);
>
> + vd = vchan_next_desc(&bchan->vc);
> if (!vd)
> return;
>
> @@ -1072,6 +1206,24 @@ static void bam_start_dma(struct bam_chan *bchan)
> return;
>
> while (vd && !IS_BUSY(bchan)) {
> + /*
> + * Open a LOCK/UNLOCK bracket around each fresh sequence.
> + * Sentinels inserted by bam_setup_pipe_lock() are skipped: they
> + * already have bam_locked set and must not trigger a second pair.
> + */
> + if (!bchan->bam_locked) {
> + ret = bam_setup_pipe_lock(bchan);
Hence, overall you meant to lock bam pipe once during the starting of
the bam dma engine ? is it ?
> + if (ret) {
> + dev_err_ratelimited(bdev->dev,
> + "failed to setup the pipe lock, deferring transfer: %d\n",
> + ret);
> + queue_work(system_bh_highpri_wq, &bdev->work);
> + break;
> + }
> + if (bchan->bam_locked)
> + vd = vchan_next_desc(&bchan->vc);
> + }
> +
> list_del(&vd->node);
>
> async_desc = container_of(vd, struct bam_async_desc, vd);
> @@ -1133,6 +1285,10 @@ static void bam_start_dma(struct bam_chan *bchan)
> bchan->tail += async_desc->xfer_len;
> bchan->tail %= MAX_DESCRIPTORS;
> list_add_tail(&async_desc->desc_node, &bchan->desc_list);
> +
> + if (async_desc->is_lock_desc &&
> + (le16_to_cpu(async_desc->desc->flags) & DESC_FLAG_UNLOCK))
> + bchan->bam_locked = false;
> }
>
[...]
next prev parent reply other threads:[~2026-07-21 18:07 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 13:33 [PATCH v23 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 01/14] dmaengine: constify struct dma_descriptor_metadata_ops Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 02/14] dmaengine: qcom: bam_dma: free interrupt before the clock in error path Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 04/14] dmaengine: qcom: bam_dma: Extend the driver's device match data Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 05/14] dmaengine: qcom: bam_dma: Add pipe_lock_supported flag support Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 06/14] dmaengine: qcom: bam_dma: add support for BAM locking Bartosz Golaszewski
2026-07-21 18:07 ` Mukesh Savaliya [this message]
[not found] ` <20260721134853.2B2401F000E9@smtp.kernel.org>
2026-07-22 8:59 ` Stephan Gerhold
2026-07-22 9:34 ` Bartosz Golaszewski
2026-07-22 12:47 ` Stephan Gerhold
2026-07-22 14:11 ` Bartosz Golaszewski
2026-07-22 14:20 ` Stephan Gerhold
2026-07-22 15:37 ` Bartosz Golaszewski
2026-07-22 16:24 ` Stephan Gerhold
2026-07-23 8:44 ` Bartosz Golaszewski
2026-07-23 10:04 ` Stephan Gerhold
2026-07-21 13:33 ` [PATCH v23 07/14] crypto: qce - Cancel work on device detach Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 08/14] crypto: qce - Include algapi.h in the core.h header Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 09/14] crypto: qce - Remove unused ignore_buf Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 10/14] crypto: qce - Simplify arguments of devm_qce_dma_request() Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 11/14] crypto: qce - Use existing devres APIs in devm_qce_dma_request() Bartosz Golaszewski
2026-07-21 18:16 ` Mukesh Savaliya
2026-07-21 13:33 ` [PATCH v23 12/14] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2026-07-21 18:20 ` Mukesh Savaliya
2026-07-22 9:17 ` Bartosz Golaszewski
2026-07-23 9:20 ` Mukesh Savaliya
2026-07-21 13:33 ` [PATCH v23 13/14] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2026-07-21 13:33 ` [PATCH v23 14/14] crypto: qce - Communicate the base physical address to the dmaengine Bartosz Golaszewski
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