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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6a24d88f2sm414275366b.15.2025.01.28.05.09.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 28 Jan 2025 05:09:41 -0800 (PST) Message-ID: Date: Tue, 28 Jan 2025 14:09:39 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/10] arm64: dts: qcom: sm8650: add OPP table support to PCIe To: Neil Armstrong , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org> <20250115-topic-sm8x50-upstream-dt-icc-update-v1-8-eaa8b10e2af7@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-8-eaa8b10e2af7@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: Y-cFtkuwTcD-jBveRhGtCN8Bh5zv9Ljm X-Proofpoint-ORIG-GUID: Y-cFtkuwTcD-jBveRhGtCN8Bh5zv9Ljm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-28_04,2025-01-27_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 suspectscore=0 bulkscore=0 mlxscore=0 phishscore=0 malwarescore=0 mlxlogscore=913 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501280100 On 15.01.2025 2:44 PM, Neil Armstrong wrote: > The PCIe bus interconnect path can be scaled depending on the > PCIe link established, add the OPP table with all the possible > link speeds and the associated power domain level. > > Signed-off-by: Neil Armstrong > --- Reviewed-by: Konrad Dybcio Konrad