From: Andrew Lunn <andrew@lunn.ch>
To: Robert Marko <robimarko@gmail.com>
Cc: hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net,
edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
ansuelsmth@gmail.com, rmk+kernel@armlinux.org.uk,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next] net: phy: aquantia: clear PMD Global Transmit Disable bit during init
Date: Tue, 13 Feb 2024 02:52:50 +0100 [thread overview]
Message-ID: <bcccaab4-fffd-43ee-ac49-8fe8a92d65a1@lunn.ch> (raw)
In-Reply-To: <20240211181732.646311-1-robimarko@gmail.com>
On Sun, Feb 11, 2024 at 07:16:41PM +0100, Robert Marko wrote:
> PMD Global Transmit Disable bit should be cleared for normal operation.
> This should be HW default, however I found that on Asus RT-AX89X that uses
> AQR113C PHY and firmware 5.4 this bit is set by default.
>
> With this bit set the AQR cannot achieve a link with its link-partner and
> it took me multiple hours of digging through the vendor GPL source to find
> this out, so lets always clear this bit during .config_init() to avoid a
> situation like this in the future.
This all look sensible. My only question is, should we have core c45
code doing this?
[Goes and looks at 802.3]
O.K, so the Marvell PHY firmware appears to be broken. The standard
says it should have a default value of 0, i.e. the transmitter should
be enabled by default. So this is just a workaround for broken
behaviour.
> Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2024-02-13 1:52 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-11 18:16 Robert Marko
2024-02-13 1:52 ` Andrew Lunn [this message]
2024-02-13 14:50 ` patchwork-bot+netdevbpf
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