From: Sudeep Holla <sudeep.holla@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Sudeep Holla <sudeep.holla@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Tan Xiaojun <tanxiaojun@huawei.com>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH 1/2] of: base: add support to get the number of cache levels
Date: Tue, 10 Jan 2017 11:56:54 +0000 [thread overview]
Message-ID: <bd0ced47-8d29-b6f6-f818-4e6d191ce383@arm.com> (raw)
In-Reply-To: <1484048479-19767-1-git-send-email-sudeep.holla@arm.com>
On 10/01/17 11:41, Sudeep Holla wrote:
> It is useful to have helper function just to get the number of cache
> levels for a given logical cpu. This patch adds the support for the
> same.
>
> It will be used on ARM64 platform where the device tree provides the
> information for the additional non-architected/transparent/external
> last level caches that are not integrated with the processors.
>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
> drivers/of/base.c | 22 ++++++++++++++++++++++
> include/linux/of.h | 1 +
> 2 files changed, 23 insertions(+)
>
I seem to have missed to generate patch after I fixed the build error.
I will send updated version of this patch.
--
Regards,
Sudeep
next prev parent reply other threads:[~2017-01-10 11:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-10 11:41 Sudeep Holla
2017-01-10 11:41 ` [PATCH 2/2] arm64: cacheinfo: add support to override cache levels via device tree Sudeep Holla
2017-01-10 11:56 ` Sudeep Holla [this message]
2017-01-10 12:00 ` [PATCH 1/2][UPDATE] of: base: add support to get the number of cache levels Sudeep Holla
2017-01-12 13:24 ` Rob Herring
2017-01-12 15:28 ` Sudeep Holla
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