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Mon, 01 Sep 2025 05:21:02 -0700 (PDT) Message-ID: Date: Mon, 1 Sep 2025 13:21:01 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 06/12] arm64/boot: Enable EL2 requirements for SPE_FEAT_FDS To: Leo Yan Cc: Catalin Marinas , Will Deacon , Mark Rutland , Jonathan Corbet , Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Anshuman Khandual , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-doc@vger.kernel.org, kvmarm@lists.linux.dev References: <20250814-james-perf-feat_spe_eft-v7-0-6a743f7fa259@linaro.org> <20250814-james-perf-feat_spe_eft-v7-6-6a743f7fa259@linaro.org> <20250901101904.GK745921@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20250901101904.GK745921@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 01/09/2025 11:19 am, Leo Yan wrote: > On Thu, Aug 14, 2025 at 10:25:28AM +0100, James Clark wrote: > > [...] > >> diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h >> index 3a4ca7f9acfb..a0361ddcdca4 100644 >> --- a/arch/arm64/include/asm/el2_setup.h >> +++ b/arch/arm64/include/asm/el2_setup.h >> @@ -392,6 +392,17 @@ >> orr x0, x0, #HDFGRTR2_EL2_nPMICFILTR_EL0 >> orr x0, x0, #HDFGRTR2_EL2_nPMUACR_EL1 >> .Lskip_pmuv3p9_\@: >> + /* If SPE is implemented, */ >> + __spe_vers_imp .Lskip_spefds_\@, ID_AA64DFR0_EL1_PMSVer_IMP, x1 >> + /* we can read PMSIDR and */ >> + mrs_s x1, SYS_PMSIDR_EL1 >> + and x1, x1, #PMSIDR_EL1_FDS >> + /* if FEAT_SPE_FDS is implemented, */ >> + cbz x1, .Lskip_spefds_\@ >> + /* disable traps to PMSDSFR. */ > > Nitpick: the comment is a bit ambiguous for me. Would it be better to > say "disable traps to EL2" or "set the PMSDSFR bit to disable trapping" ? > > Otherwise, LGTM: > > Reviewed-by: Leo Yan The bit we're setting is actually called nPMSDSFR_EL1, but I can change it to: /* disable traps of PMSDSFR to EL2 */ > >> + orr x0, x0, #HDFGRTR2_EL2_nPMSDSFR_EL1 >> + >> +.Lskip_spefds_\@: >> msr_s SYS_HDFGRTR2_EL2, x0 >> msr_s SYS_HDFGWTR2_EL2, x0 >> msr_s SYS_HFGRTR2_EL2, xzr >> >> -- >> 2.34.1 >>