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Date: Fri, 5 Mar 2010 11:51:32 -0800
Message-ID: <bd4cb8901003051151s795839ddq67640fc9ad73c7bd@mail.gmail.com>
Subject: Re: [PATCH 06/14] perf, x86: PEBS infrastructure
From: Stephane Eranian <eranian@google.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Paul Mackerras <paulus@samba.org>, mingo@elte.hu,
       linux-kernel@vger.kernel.org, robert.richter@amd.com,
       fweisbec@gmail.com, Arnaldo Carvalho de Melo <acme@infradead.org>
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On Fri, Mar 5, 2010 at 11:39 AM, Peter Zijlstra <peterz@infradead.org> wrote:
> On Fri, 2010-03-05 at 11:11 -0800, Stephane Eranian wrote:
>> By rewinding you get the IP of the instruction that caused the event. But the
>> register state is STILL reflecting the situation at retirement of that
>> instruction.
>
> I'm quite aware of that, but its near impossible to reverse interpret
> instructions such as "mov rdx, $rdx", so until we get fault like PEBS
> we'll just have to live with this.
>
I am sure you are, but that's not necessarily true of everybody.
So this needs to be clearly spelled out in some documentation
about precise + your MISC_EXACT bit.