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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fa80cb6sm1567289066b.7.2025.11.19.01.14.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Nov 2025 01:14:44 -0800 (PST) Message-ID: Date: Wed, 19 Nov 2025 10:14:41 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RESEND 2/2] drm/msm/dpu: use full scale alpha in _dpu_crtc_setup_blend_cfg() To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20251118-dpu-rework-alpha-v1-0-293d39402b59@oss.qualcomm.com> <20251118-dpu-rework-alpha-v1-2-293d39402b59@oss.qualcomm.com> <5c2e47f0-ba96-4433-b13e-9e819cfe2204@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE5MDA3MiBTYWx0ZWRfXy3TBqhV2BEtQ C6cnlhE01BDJElZ6vS0qL0g4statQA4++y4BVKxLMqATRqbcfh+5B3nl2WN//ISyTogfHL5Sq37 aC63qz77DW6nFs39AGcHpkdVS+POLXPCFTAj5iAeFO81MH4tgY82nZN9v0suQaIuEiZUjgClO8L Zccn6EkSyLc5d6DAm6gbN5qW2oe20e+OeiO3bjTPqzXyJ3ZQCngAGQ6yKTxcs2fH7wwLeaTrslg fp4bM6LM8wXk4LZzxMsIzF6KKihp7W7Y3zYU9OVG4jDmoPzpPMZFBm5+W/gYwaSeCWxCBez3xyZ WqAFDhznJmFalLnPHIa9kvp0S3CQjoSR9vxN+iJ+4i+DQVKsY/4Xtt6CDGlRor0gETBY+gn6s2S IgeVUnj26jpmrHZ8xmOk++MR6qirGA== X-Proofpoint-GUID: xvvZGlOkGgIMQd_TDx3m21eq1XIkkx0V X-Authority-Analysis: v=2.4 cv=a7k9NESF c=1 sm=1 tr=0 ts=691d8a85 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=YLj65xLjQURtOJfc0jEA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-ORIG-GUID: xvvZGlOkGgIMQd_TDx3m21eq1XIkkx0V X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-19_02,2025-11-18_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 spamscore=0 priorityscore=1501 impostorscore=0 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511190072 On 11/19/25 8:50 AM, Dmitry Baryshkov wrote: > On Tue, Nov 18, 2025 at 04:02:03PM +0100, Konrad Dybcio wrote: >> On 11/18/25 3:51 PM, Dmitry Baryshkov wrote: >>> Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha() >>> callbacks embed knowledge about platform's alpha range (8-bit or >>> 10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for >>> alpha and reduce alpha only in DPU-specific callbacks. >>> >>> Signed-off-by: Dmitry Baryshkov >>> --- >> >> [...] >> >>> - const_alpha = (bg_alpha & 0xFF) | ((fg_alpha & 0xFF) << 16); >>> + const_alpha = ((bg_alpha >> 8) & 0xff) | >>> + (((fg_alpha >> 8) & 0xff) << 16); >> >> This begs for some bitfield.h > > Which one(s) would you recommend? Ideally it should be something like > 'get N top bits', but I don't see one. Perhaps we can create one.. there's include/linux/wordpart.h with upper/lower_16/32_bits().. Maybe we could add #define lower_n_bits(x, n) (FIELD_GET(GENMASK((n - 1), 0), x) // register def #define CONST_ALPHA_BG GENMASK(,) #define CONST_ALPHA_FG GENMASK(,) const_alpha = FIELD_GET(CONST_ALPHA_BG, lower_n_bits(bg_alpha, 8)) | FIELD_GET(CONST_ALPHA_FG, lower_n_bits(fg_alpha, 8)); At which point it arguably becomes equally difficult to read.. but I think the rule of thumb is that syntax sugar is better than raw bitops ;) Konrad