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From: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
To: David Laight <david.laight.linux@gmail.com>
Cc: Yury Norov <yury.norov@gmail.com>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	Rasmus Villemoes <linux@rasmusvillemoes.dk>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tursulin@ursulin.net>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-kernel@vger.kernel.org, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org,
	Andi Shyti <andi.shyti@linux.intel.com>,
	David Laight <David.Laight@ACULAB.COM>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK()
Date: Fri, 7 Mar 2025 18:58:08 +0900	[thread overview]
Message-ID: <bdce7d99-7f02-4667-acda-9ffc62c92af2@wanadoo.fr> (raw)
In-Reply-To: <20250306192331.2701a029@pumpkin>

On 07/03/2025 at 04:23, David Laight wrote:
> On Thu, 06 Mar 2025 20:29:52 +0900
> Vincent Mailhol via B4 Relay <devnull+mailhol.vincent.wanadoo.fr@kernel.org> wrote:
> 
>> From: Vincent Mailhol <mailhol.vincent@wanadoo.fr>
>>
>> In an upcoming change, GENMASK() and its friends will indirectly
>> depend on sizeof() which is not available in asm.
>>
>> Instead of adding further complexity to __GENMASK() to make it work
>> for both asm and non asm, just split the definition of the two
>> variants.
> ...
>> +#else /* defined(__ASSEMBLY__) */
>> +
>> +#define GENMASK(h, l)		__GENMASK(h, l)
>> +#define GENMASK_ULL(h, l)	__GENMASK_ULL(h, l)
> 
> What do those actually expand to now?
> As I've said a few times both UL(0) and ULL(0) are just (0) for __ASSEMBLY__
> so the expansions of __GENMASK() and __GENMASK_ULL() contained the
> same numeric constants.

Indeed, in asm, the UL(0) and ULL(0) expands to the same thing: 0.

But the two macros still expand to something different on 32 bits
architectures:

  * __GENMASK:

      (((~(0)) << (l)) & (~(0) >> (32 - 1 - (h))))

  * __GENMASK_ULL:

      (((~(0)) << (l)) & (~(0) >> (64 - 1 - (h))))

On 64 bits architecture these are the same.

> This means they should be generating the same values.
> I don't know the correct 'sizeof (int_type)' for the shift right of ~0.
> My suspicion is that a 32bit assembler used 32bit signed integers and a
> 64bit one 64bit signed integers (but a 32bit asm on a 64bit host might
> be 64bit).
> So the asm versions need to avoid the right shift and only do left shifts.
> 
> Which probably means they need to be enirely separate from the C versions.
> And then the C ones can have all the ULL() removed.

In this v5, I already have the ULL() removed from the non-uapi C
version. And we are left with two distinct variants:

  - the uapi C & asm
  - the non-uapi C (including fix width)

For the uapi ones, I do not think we can modify it without a risk of
breaking some random userland. At least, this is not a risk I will take.
And if we have to keep the __GENMASK() and __GENMASK_ULL(), then I would
rather just reuse these for the asm variant instead of splitting further
more and finding ourselves with three variants:

  - the uapi C
  - the asm
  - the non-uapi C (including fix width)

If __GENMASK() and __GENMASK_ULL() were not in the uapi, I would have
agreed with you.

If you believe that the risk of modifying the uapi GENMASK*() is low
enough, then you can submit a patch. But I will definitely not touch
these myself.


Yours sincerely,
Vincent Mailhol


  reply	other threads:[~2025-03-07  9:58 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-06 11:29 [PATCH v5 0/7] bits: Fixed-type GENMASK()/BIT() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 1/7] bits: split the definition of the asm and non-asm GENMASK() Vincent Mailhol via B4 Relay
2025-03-06 13:05   ` Andy Shevchenko
2025-03-06 15:07     ` Vincent Mailhol
2025-03-06 17:51       ` Andy Shevchenko
2025-03-06 14:34   ` Lucas De Marchi
2025-03-06 17:10     ` Vincent Mailhol
2025-03-13  4:16       ` Lucas De Marchi
2025-03-13  6:06         ` Vincent Mailhol
2025-03-06 19:23   ` David Laight
2025-03-07  9:58     ` Vincent Mailhol [this message]
2025-03-07 13:27       ` David Laight
2025-03-07 15:50         ` Vincent Mailhol
2025-03-09  1:58       ` David Laight
2025-03-09 10:23         ` David Laight
2025-03-10 10:46           ` Vincent Mailhol
2025-03-06 11:29 ` [PATCH v5 2/7] bits: introduce fixed-type genmasks Vincent Mailhol via B4 Relay
2025-03-06 13:08   ` Andy Shevchenko
2025-03-06 16:08     ` Vincent Mailhol
2025-03-06 17:53       ` Andy Shevchenko
2025-03-06 11:29 ` [PATCH v5 3/7] bits: introduce fixed-type BIT_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 4/7] drm/i915: Convert REG_GENMASK*() to fixed-width GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 5/7] test_bits: add tests for __GENMASK() and __GENMASK_ULL() Vincent Mailhol via B4 Relay
2025-03-13  4:13   ` Lucas De Marchi
2025-03-13  6:00     ` Vincent Mailhol
2025-03-13 13:15       ` Lucas De Marchi
2025-03-06 11:29 ` [PATCH v5 6/7] test_bits: add tests for GENMASK_U*() Vincent Mailhol via B4 Relay
2025-03-06 11:29 ` [PATCH v5 7/7] test_bits: add tests for BIT_U*() Vincent Mailhol via B4 Relay
2025-03-06 13:11   ` Andy Shevchenko
2025-03-06 16:08     ` Vincent Mailhol
2025-03-06 17:55       ` Andy Shevchenko
2025-03-07 10:11         ` Vincent Mailhol
2025-03-07 16:07           ` Andy Shevchenko
2025-03-07 16:47             ` Vincent Mailhol
2025-03-13  4:10   ` Lucas De Marchi
2025-03-06 13:02 ` [PATCH v5 0/7] bits: Fixed-type GENMASK()/BIT() Andy Shevchenko
2025-03-06 14:56   ` Vincent Mailhol
2025-03-06 13:12 ` Andy Shevchenko

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