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Mon, 12 Oct 2026 07:02:53 -0700 (PDT) X-Received: by 2002:a05:6122:650b:b0:5e0:2ba:5a06 with SMTP id 71dfb90a1353d-5e91f576816mr1607545e0c.4.1791813773496; Mon, 12 Oct 2026 07:02:53 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b179dd5e85sm4897063a12.21.2026.10.12.07.02.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 12 Oct 2026 07:02:52 -0700 (PDT) Message-ID: Date: Mon, 12 Oct 2026 16:02:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] i2c: qcom-cci: Fix HALT_ACK reset request being dropped To: Loic Poulain , Robert Foss , Andi Shyti , Vinod Koul , Wolfram Sang , Bjorn Andersson , Todor Tomov Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261012-cci-fixes-v1-1-8cd4eb1fc5f9@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261012-cci-fixes-v1-1-8cd4eb1fc5f9@oss.qualcomm.com> Content-Type: text/plain; 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However, the interrupt handler currently overwrites > the reset mask when processing each HALT_ACK condition, causing the > first reset request to be lost if both events are reported together. > > Accumulate reset requests instead of overwriting them so that both > masters are properly reset when M0 and M1 HALT_ACK events occur in the > same interrupt. > > Fixes: e517526195de4 ("i2c: Add Qualcomm CCI I2C driver") > Signed-off-by: Loic Poulain > --- Reviewed-by: Konrad Dybcio Konrad