From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB9B43BD642 for ; Wed, 8 Apr 2026 15:39:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775662802; cv=none; b=EBptQbudDYfrvY+asvjSh6yXd/X+CGG1xLyv8+KULC7Ax4aqSDOEUXKZ6wQN0IHWXwlyctxPNwtVLwrWajMZ5e1fwvZxvrbaKuydGBvhjb6vtthWPUf+H5ZzMcYm59du6hQuwNFX1XqVX8WVKL3cVSLa2JwhcVipJBAox1JAWtk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775662802; c=relaxed/simple; bh=BQsAaNt1zClDmtVAGw4LQZtzFUvCyuQ8rJ3P8oqhGmg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=l1iqpGbdIspAN6y+3h+EV3KieL3OqolvjY5K1MnmGUj52Qwcvxyf3FYPy8F4gbOoWyqeLiKkjOUPstmAyQ7M/Wl8Wh38ynlVGtS02J3b+pAPq+ChuOeJl9RvHH/BmtyrPG0AdTABr0uR3KU9Qyeu16PI0KnpFQheZ2i3NT5bRkk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=eU3sWnKC; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="eU3sWnKC" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 1FFA21A31FF; Wed, 8 Apr 2026 15:39:54 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E9950603CB; Wed, 8 Apr 2026 15:39:53 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id F2C57104500FE; Wed, 8 Apr 2026 17:39:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1775662792; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:content-language:in-reply-to:references; bh=cggLDteGIAY6o5iUmEqsbCcoytc+rXJUlqQQpdlnP8M=; b=eU3sWnKCS7WHZMQ0hg2gS1RVEX5ECwt56L+XDVQPDYNltFSlyy0O7oLsD/BgdIuAtonx5d //5ZjfzkBrzlikl3ZPK5APdC7/xa/Pt9O5qx7s9+3/HZ17SJQs6XicaYE/Eoy7wVIFOMHi yoeWdTR3T9fBmZfRvUI7wN68E0BdefLfXEkNZmnOZiQQpdDMup5+3fLDq0fettWAGVDY/p cXKjpFFDfeZG+YlEeRHVqNYbTQ7VnRN7Zr2NzciyKun/EpVR6SCPgDfRXojnimOHktqsNG feESdoYupz/79ANxiqf5kSwciRS7/X5Hh1/cXVggD2FCcYlzu4ahfbhQyFyOYw== Message-ID: Date: Wed, 8 Apr 2026 17:40:28 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/3] drm/bridge: ti-sn65dsi83: add test pattern generation support To: Luca Ceresoli , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Frieder Schrempf , Marek Vasut , Linus Walleij Cc: Thomas Petazzoni , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org References: <20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-0-2e15f5a9a6a0@bootlin.com> <20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-3-2e15f5a9a6a0@bootlin.com> From: Louis Chauvet Content-Language: en-US In-Reply-To: <20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-3-2e15f5a9a6a0@bootlin.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Last-TLS-Session-Version: TLSv1.3 On 2/26/26 17:16, Luca Ceresoli wrote: > Generation of a test pattern output is a useful tool for panel bringup and > debugging, and very simple to support with this chip. > > The value of REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW needs to be divided by two > for the test pattern to work in dual LVDS mode. While not clearly stated in > the datasheet, this is needed according to the DSI Tuner [0] output. And > some dual-LVDS panels refuse to show any picture without this division by > two. > > [0] https://www.ti.com/tool/DSI-TUNER > > Signed-off-by: Luca Ceresoli > --- > drivers/gpu/drm/bridge/ti-sn65dsi83.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c b/drivers/gpu/drm/bridge/ti-sn65dsi83.c > index 17a885244e1e..ddc8b5e1dd15 100644 > --- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c > @@ -114,6 +114,7 @@ > #define REG_VID_CHA_HORIZONTAL_FRONT_PORCH 0x38 > #define REG_VID_CHA_VERTICAL_FRONT_PORCH 0x3a > #define REG_VID_CHA_TEST_PATTERN 0x3c > +#define REG_VID_CHA_TEST_PATTERN_EN BIT(4) > /* IRQ registers */ > #define REG_IRQ_GLOBAL 0xe0 > #define REG_IRQ_GLOBAL_IRQ_EN BIT(0) > @@ -134,6 +135,9 @@ > #define REG_IRQ_STAT_CHA_SOT_BIT_ERR BIT(2) > #define REG_IRQ_STAT_CHA_PLL_UNLOCK BIT(0) > > +static bool sn65dsi83_test_pattern; > +module_param_named(test_pattern, sn65dsi83_test_pattern, bool, 0644); > + > enum sn65dsi83_channel { > CHANNEL_A, > CHANNEL_B > @@ -645,7 +649,11 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge, > REG_LVDS_LANE_CHB_LVDS_TERM : 0)); > regmap_write(ctx->regmap, REG_LVDS_CM, 0x00); > > - le16val = cpu_to_le16(mode->hdisplay); > + /* > + * Active line length needs to be halved for test pattern > + * generation in dual LVDS output. > + */ > + le16val = cpu_to_le16(mode->hdisplay / (sn65dsi83_test_pattern ? 2 : 1)); This will always half the line length, even for "mono" LVDS output no? From the comment I expect something like if (dual && test_pattern) val = hdisplay/2 else val = hdisplay > regmap_bulk_write(ctx->regmap, REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW, > &le16val, 2); > le16val = cpu_to_le16(mode->vdisplay); > @@ -668,7 +676,8 @@ static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge, > (mode->hsync_start - mode->hdisplay) / dual_factor); > regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH, > mode->vsync_start - mode->vdisplay); > - regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00); > + regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, > + sn65dsi83_test_pattern ? REG_VID_CHA_TEST_PATTERN_EN : 0); > (sn65dsi83_test_pattern is not "atomic", but you already saw it) > /* Enable PLL */ > regmap_write(ctx->regmap, REG_RC_PLL_EN, REG_RC_PLL_EN_PLL_EN); >