From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.mindbit.ro (xs1.mindbit.ro [80.86.107.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47F081E1E16 for ; Tue, 24 Mar 2026 20:32:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=80.86.107.70 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774384343; cv=none; b=uIHRs7cCVG366++UrZC9lrdp4bl7ukgMy8DvAsG/qLbRhgTPrV04W14p4b9uwqwpbeOxxOK3IXXFvnbyCrY2iYwTkIPLBJuzzCl8DxjyEAOkGb2jMJ+URZ71654R3IUqxe0XyBrjxqCn70TjaVFSS8efu/nNX+BzNFKEFO1Rvu4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774384343; c=relaxed/simple; bh=4EGOSdR5usj3MIJzIMIYomGEajTOGlbIwYDSiT5SdEY=; h=Message-ID:Subject:From:To:Cc:Date:In-Reply-To:References: Content-Type:MIME-Version; b=dc641qEsdeZ+TS/TVSkudyWMatvwEYjCuA7w//cp8GXXccB6Cz+f8T4vT/iyQSBY2blfmsfNA6gjewRYdYymc2WA6x52ZfHoTaSQUMrijC5ouRnI+TeYt2WCsRYEnUL984R8Fy8lcV/w27TsD2lCHXA/buCnwVek6RIrd8ngXWg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net; spf=pass smtp.mailfrom=rendec.net; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b=Uv9z0/qM; arc=none smtp.client-ip=80.86.107.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=rendec.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rendec.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rendec.net header.i=@rendec.net header.b="Uv9z0/qM" Received: from thinkpad-p1.localdomain (pool-174-112-193-187.cpe.net.cable.rogers.com [174.112.193.187]) by mail.mindbit.ro (Postfix) with ESMTPSA id BAC6EC238F; Tue, 24 Mar 2026 22:32:17 +0200 (EET) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.mindbit.ro BAC6EC238F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rendec.net; s=default; t=1774384338; bh=0jP1BU3qWn2MTn5F5esrCsN5Np7zkvVIYLvAgMN0dIk=; h=Subject:From:To:Cc:Date:In-Reply-To:References:From; b=Uv9z0/qMXdDxK0djpmTlhgnPoDOxJ39xyKF3JtLJ6qe0lotfllxnYy9Zpuc0+okj8 Sluirx/YNmrziCLuFi93sZd2fqDPHRPsjLBapS0m4ZDzd+V8FAsnXUaWR2RSvk9Sh7 GGSIbctwylZWjR2edRGXzU6f+K22opypoe2Utk99WxNX7rC5krRaiK5IOdgbDRETnC bZlBwuIZBsx+x+91FDeyd5+GZZarERFO09Ai3LQrxCI17iY1agcHnNGWNiidmYXfKD bOtSEReeC2jcisGU1TqRG6/oguFhJOX55THVBaLL3Sb+c/ckiYTUWRXwnFsKhUDvDg PnVaVN3Uwxnxg== Message-ID: Subject: Re: [patch v2 04/14] x86/irq: Make irqstats array based From: Radu Rendec To: Thomas Gleixner , LKML Cc: x86@kernel.org, Dmitry Ilvokhin , Neil Horman , Florian Fainelli Date: Tue, 24 Mar 2026 16:32:15 -0400 In-Reply-To: <871ph9ges3.ffs@tglx> References: <20260320131108.344376329@kernel.org> <20260320132102.297759330@kernel.org> <874im5gfzp.ffs@tglx> <871ph9ges3.ffs@tglx> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-2.fc42) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2026-03-24 at 21:21 +0100, Thomas Gleixner wrote: > On Tue, Mar 24 2026 at 20:54, Thomas Gleixner wrote: >=20 > > On Mon, Mar 23 2026 at 15:24, Radu Rendec wrote: > > > On Fri, 2026-03-20 at 14:21 +0100, Thomas Gleixner wrote: > > > > =C2=A0arch/x86/include/asm/hardirq.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = |=C2=A0=C2=A0 69 +++++----- > > >=20 > > > I believe this breaks scripts/gdb/linux/interrupts.py, particularly t= he > > > x86_show_irqstat() function, which still expects individual members i= n > > > struct irq_cpustat_t. > >=20 > > Uurg. I did not even know this exists. Let me try to polish the snake. >=20 > Something like the below should work, now I have to figure out how to > test it. At a glance, it looks about right (although I haven't tested it). The test procedure involves running the kernel in a Qemu VM and attaching with gdb to Qemu's gdb server (apologies if I'm just stating the obvious here). It's briefly described here: Documentation/dev-tools/gdb-kernel-debugging.rst The documentation doesn't elaborate on Qemu parameters. I'm using something like this: qemu-system-x86_64 -nographic -m 1G -accel kvm -machine q35,hpet=3Doff -cpu= host -smp 4 \ -netdev bridge,br=3Dvbr-nat,id=3Dnet0 -device virtio-net-pci,mac=3D= 52:54:98:aa:bb:cc,netdev=3Dnet0 \ -drive file=3Droot.img,format=3Draw,if=3Dvirtio \ -kernel bzImage \ -append "console=3DttyS0 root=3D/dev/vda1 rw nokaslr" \ -s Happy to help if something doesn't quite work for you. > ---- > --- a/scripts/gdb/linux/interrupts.py > +++ b/scripts/gdb/linux/interrupts.py > @@ -97,8 +97,8 @@ irq_desc_type =3D utils.CachedType("struct > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D "%*s: %10u\n" = % (prec, "ERR", cnt['counter']) > =C2=A0=C2=A0=C2=A0=C2=A0 return text > =C2=A0 > -def x86_show_irqstat(prec, pfx, field, desc): > -=C2=A0=C2=A0=C2=A0 irq_stat =3D gdb.parse_and_eval("&irq_stat") > +def x86_show_irqstat(prec, pfx, idx, desc): > +=C2=A0=C2=A0=C2=A0 irq_stat =3D gdb.parse_and_eval("&irq_stat.counts[IRQ= _COUNT_%s]" %idx) > =C2=A0=C2=A0=C2=A0=C2=A0 text =3D "%*s: " % (prec, pfx) > =C2=A0=C2=A0=C2=A0=C2=A0 for cpu in cpus.each_online_cpu(): > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 stat =3D cpus.per_cpu(ir= q_stat, cpu) > @@ -118,32 +118,51 @@ irq_desc_type =3D utils.CachedType("struct > =C2=A0=C2=A0=C2=A0=C2=A0 text =3D x86_show_irqstat(prec, "NMI", '__nmi_co= unt', 'Non-maskable interrupts') > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_LOCAL_APIC: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "LOC", 'apic_timer_irqs', "Local timer interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "SPU", 'irq_spurious_count', "Spurious interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PMI", 'apic_perf_irqs', "Performance monitoring interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "IWI", 'apic_irq_work_irqs', "IRQ work interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "RTR", 'icr_read_retry_count', "APIC ICR read retries") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "LOC", 'APIC_TIMER', "Local timer interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "SPU", 'SPURIOUS', "Spurious interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PMI", 'APIC_PERF', "Performance monitoring interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "IWI", 'IRQ_WORK', "IRQ work interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "RTR", 'ICR_READ_RETRY', "APIC ICR read retries") > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if utils.gdb_eval_or_non= e("x86_platform_ipi_callback") is not None: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text = +=3D x86_show_irqstat(prec, "PLT", 'x86_platform_ipis', "Platform interrupt= s") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text = +=3D x86_show_irqstat(prec, "PLT", 'X86_PLATFORM_IPI', "Platform interrupts= ") > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_SMP: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "RES", 'irq_resched_count', "Rescheduling interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "CAL", 'irq_call_count', "Function call interrupts") > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "TLB", 'irq_tlb_count', "TLB shootdowns") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "RES", 'RESCHEDULE', "Rescheduling interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "CAL", 'CALL_FUNCTION', "Function call interrupts") > + > +=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(prec, "TLB", 'TLB', "TLB s= hootdowns") > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_THERMAL_VECTOR: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "TRM", 'irq_thermal_count', "Thermal events interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "TRM", 'THERMAL_APIC', "Thermal events interrupts") > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_MCE_THRESHOLD: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "THR", 'irq_threshold_count', "Threshold APIC interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "THR", 'THRESHOLD_APIC', "Threshold APIC interrupts") > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_MCE_AMD: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "DFR", 'irq_deferred_error_count', "Deferred Error APIC interrupts") > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "DFR", 'DEFERRED_ERROR', "Deferred Error APIC interrupts") > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_MCE: > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_mce(p= rec, "&mce_exception_count", "MCE", "Machine check exceptions") > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_mce(p= rec, "&mce_poll_count", "MCP", "Machine check polls") > =C2=A0 > +=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_HV_CALLBACK_VECTOR: > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, 'HYP', 'HYPERVISOR_CALLBACK', 'Hypervisor callback interrupts') > + > +=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_HYPERV: > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, 'HRE', 'HYPERV_REENLIGHTENMENT', 'Hyper-V reenlightenment interrupts') > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, 'HVS', 'HYPERV_STIMER0', 'Hyper-V stimer0 interrupts') > + > +=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_KVM: > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PIN", 'POSTED_INTR', 'Posted-interrupt notification event') > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "NPI", 'POSTED_INTR_NESTED', 'Nested posted-interrupt event') > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PIW", 'POSTED_INTR_WAKEUP', 'Posted-interrupt wakeup event') > + > +=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_GUEST_PERF_EVENTS: > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "VPMI", 'PERF_GUEST_MEDIATED_PMI', 'Perf Guest Mediated PMI') > + > +=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_POSTED_MSI: > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PIN", 'POSTED_MSI_NOTIFICATION', 'Posted MSI notification event') > + > =C2=A0=C2=A0=C2=A0=C2=A0 text +=3D show_irq_err_count(prec) > =C2=A0 > =C2=A0=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_X86_IO_APIC: > @@ -151,11 +170,6 @@ irq_desc_type =3D utils.CachedType("struct > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if cnt is not None: > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 = text +=3D "%*s: %10u\n" % (prec, "MIS", cnt['counter']) > =C2=A0 > -=C2=A0=C2=A0=C2=A0 if constants.LX_CONFIG_KVM: > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PIN", 'kvm_posted_intr_ipis', 'Posted-interrupt notification event') > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "NPI", 'kvm_posted_intr_nested_ipis', 'Nested posted-interrupt event') > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 text +=3D x86_show_irqstat(pr= ec, "PIW", 'kvm_posted_intr_wakeup_ipis', 'Posted-interrupt wakeup event') > - > =C2=A0=C2=A0=C2=A0=C2=A0 return text > =C2=A0 > =C2=A0def arm_common_show_interrupts(prec):