From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751124AbeAVOkR (ORCPT ); Mon, 22 Jan 2018 09:40:17 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:55711 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751020AbeAVOkP (ORCPT ); Mon, 22 Jan 2018 09:40:15 -0500 From: Philippe CORNU To: Rob Herring CC: Yannick FERTRE , Benjamin Gaignard , Vincent ABRIOU , "David Airlie" , Mark Rutland , "Maxime Coquelin" , Alexandre TORGUE , dri-devel , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" , "Mickael REULIER" , Gabriel FERNANDEZ , Ludovic BARRE Subject: Re: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example Thread-Topic: [PATCH] dt-bindings: display: stm32: correct clock-names in dsi panel example Thread-Index: AQHTk42ejFr7l7SpYEyjCCeearBzI6N/5dKA Date: Mon, 22 Jan 2018 14:39:46 +0000 Message-ID: References: <20180121205807.30677-1-philippe.cornu@st.com> In-Reply-To: Accept-Language: fr-FR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: user-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.45] Content-Type: text/plain; charset="utf-8" Content-ID: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-01-22_06:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id w0MEeMW7032595 Hi Rob, On 01/22/2018 03:30 PM, Rob Herring wrote: > On Sun, Jan 21, 2018 at 2:58 PM, Philippe Cornu wrote: >> In the dsi panel example, clock names in the "clock-names" >> field have been swapped: >> * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4 >> * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4 >> >> Signed-off-by: Philippe Cornu >> --- >> Documentation/devicetree/bindings/display/st,stm32-ltdc.txt | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt >> index 029252253ad4..3eb1b48b47dd 100644 >> --- a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt >> +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt >> @@ -98,7 +98,7 @@ Example 2: DSI panel >> compatible = "st,stm32-dsi"; >> reg = <0x40016c00 0x800>; >> clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>; >> - clock-names = "ref", "pclk"; >> + clock-names = "pclk", "ref"; > > There is no way to tell they are reversed because pclk is not even > documented. Please fix that too. > Many thanks for your review. pclk is already described in the generic part (Documentation/devicetree/bindings/display/bridge/dw_mipi_dsi.txt). In st,stm32-ltdc.txt (specific part), I have documented: "For all mandatory properties & nodes, please refer to the related documentation in [5]". Do you think it is clear enough? Many thanks, Philippe :-) >> resets = <&rcc STM32F4_APB2_RESET(DSI)>; >> reset-names = "apb"; >> >> -- >> 2.15.1 >>