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Tue, 02 Jun 2026 15:22:42 -0700 (PDT) Message-ID: Date: Tue, 2 Jun 2026 23:22:41 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 2/2] phy: qcom-mipi-csi2: Add a CSI2 MIPI DPHY driver To: Vladimir Zapolskiy , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Bryan O'Donoghue , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260523-x1e-csi2-phy-v8-0-a85668459521@linaro.org> <20260523-x1e-csi2-phy-v8-2-a85668459521@linaro.org> <54904b61-222d-4600-ad4c-c03a9952d337@linaro.org> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: <54904b61-222d-4600-ad4c-c03a9952d337@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 02/06/2026 23:07, Vladimir Zapolskiy wrote: >> +    ret = fwnode_property_read_u32(ep, "clock-lanes", &clock_lane); >> +    if (ret) { >> +        clock_lane = CSI2_DEFAULT_CLK_LN; >> +        dev_info(dev, "Using default clock-lane %d\n", >> +             CSI2_DEFAULT_CLK_LN); > > Why CSI2_DEFAULT_CLK_LN is set to 7, what does it mean and how is it used? > > Since "7" is a meaningless number in the context, I believe it's > practically > not used at all, and if so, 'clock-lanes' property should be just removed. Documentation shows clock lane at lane 7. Truthfully it makes no sense that the clock lane would genuinely be locked to lane 7 but the documentation does seem to suggest it. Yes in fact I agree. clock-lanes can be reintroduced if someone can show hardware that supports/depends on it. --- bod