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From: Hanjun Guo <hanjun.guo@linaro.org>
To: Tomasz Nowicki <tn@semihalf.com>,
	marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net,
	rjw@rjwysocki.net, bhelgaas@google.com,
	lorenzo.pieralisi@arm.com, robert.richter@caviumnetworks.com,
	shijie.huang@arm.com, Suravee.Suthikulpanit@amd.com
Cc: al.stone@linaro.org, mw@semihalf.com, graeme.gregory@linaro.org,
	Catalin.Marinas@arm.com, will.deacon@arm.com,
	linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, ddaney.cavm@gmail.com,
	okaya@codeaurora.org, andrea.gallo@linaro.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH V7 6/8] irqchip/gicv3-its: Probe ITS in the ACPI way
Date: Tue, 21 Jun 2016 16:03:54 +0800	[thread overview]
Message-ID: <bebbe715-19df-be34-40d9-6845f38b9c2f@linaro.org> (raw)
In-Reply-To: <1466420541-20101-7-git-send-email-tn@semihalf.com>

On 2016/6/20 19:02, Tomasz Nowicki wrote:
> ITS is prepared for being initialized different than DT,
> therefore we can initialize it in ACPI way. We collect register base
> address from MADT table and pass mandatory info to firmware-agnostic
> ITS init call.
>
> Use here IORT lib to register ITS domain which then can be found and
> used on to build another PCI MSI domain in hierarchical stack domain.
>
> NOTE: Waiting for proper ITS and NUMA node relation description in IORT
> table, we pass around NUMA_NO_NODE to the its_probe_one init call.
> This means that Cavium ThunderX erratum 23144 (pass1.1 only)
> is not supported for ACPI boot method yet.
>
> Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  drivers/irqchip/Kconfig          |  1 +
>  drivers/irqchip/irq-gic-v3-its.c | 59 +++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 59 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 5495a5b..fd4b8b8 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -38,6 +38,7 @@ config ARM_GIC_V3
>  config ARM_GIC_V3_ITS
>  	bool
>  	select PCI_MSI_IRQ_DOMAIN
> +	select IORT_TABLE if ACPI
>
>  config ARM_NVIC
>  	bool
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 1e0888d..c5c8616 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -15,10 +15,13 @@
>   * along with this program.  If not, see <http://www.gnu.org/licenses/>.
>   */
>
> +#include <linux/acpi.h>
>  #include <linux/bitmap.h>
>  #include <linux/cpu.h>
>  #include <linux/delay.h>
>  #include <linux/interrupt.h>
> +#include <linux/irqdomain.h>
> +#include <linux/iort.h>
>  #include <linux/log2.h>
>  #include <linux/mm.h>
>  #include <linux/msi.h>
> @@ -1438,6 +1441,11 @@ static int its_irq_gic_domain_alloc(struct irq_domain *domain,
>  		fwspec.param[0] = GIC_IRQ_TYPE_LPI;
>  		fwspec.param[1] = hwirq;
>  		fwspec.param[2] = IRQ_TYPE_EDGE_RISING;
> +	} else if (is_fwnode_irqchip(domain->parent->fwnode)) {
> +		fwspec.fwnode = domain->parent->fwnode;
> +		fwspec.param_count = 2;
> +		fwspec.param[0] = hwirq;
> +		fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
>  	} else {
>  		return -EINVAL;
>  	}
> @@ -1792,6 +1800,55 @@ static int __init its_of_probe(struct device_node *node)
>  	return 0;
>  }
>
> +#ifdef CONFIG_ACPI
> +
> +#define ACPI_GICV3_ITS_MEM_SIZE (SZ_128K)
> +
> +static int __init gic_acpi_parse_madt_its(struct acpi_subtable_header *header,
> +					  const unsigned long end)
> +{
> +	struct acpi_madt_generic_translator *its_entry;
> +	struct fwnode_handle *dom_handle;
> +	struct resource res;
> +	int err;
> +
> +	its_entry = (struct acpi_madt_generic_translator *)header;
> +	res.start = its_entry->base_address;
> +	res.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1;
> +
> +	dom_handle = irq_domain_alloc_fwnode((void *)its_entry->base_address);
> +	if (!dom_handle) {
> +		pr_err("ITS@%pa: Unable to allocate GICv3 ITS domain token\n",
> +		       &res.start);
> +		return -ENOMEM;
> +	}
> +
> +	err = iort_register_domain_token(its_entry->translation_id, dom_handle);
> +	if (err) {
> +		pr_err("ITS@%pa: Unable to register GICv3 ITS domain token (ITS ID %d) to IORT\n",
> +		       &res.start, its_entry->translation_id);
> +		goto dom_err;
> +	}
> +
> +	err = its_probe_one(&res, dom_handle, NUMA_NO_NODE);
> +	if (!err)
> +		return 0;
> +
> +	iort_deregister_domain_token(its_entry->translation_id);
> +dom_err:
> +	irq_domain_free_fwnode(dom_handle);
> +	return err;
> +}
> +
> +static void __init its_acpi_probe(void)
> +{
> +	acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
> +			      gic_acpi_parse_madt_its, 0);
> +}
> +#else
> +static void __init its_acpi_probe(void) { }
> +#endif
> +
>  int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
>  		    struct irq_domain *parent_domain)
>  {
> @@ -1802,7 +1859,7 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists,
>  	if (of_node)
>  		its_of_probe(of_node);
>  	else
> -		return -ENODEV;
> +		its_acpi_probe();
>
>  	if (list_empty(&its_nodes)) {
>  		pr_warn("ITS: No ITS available, not enabling LPIs\n");
>

Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>

Thanks
Hanjun

  reply	other threads:[~2016-06-21  8:05 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-20 11:02 [PATCH V7 0/8] Introduce ACPI world to ITS irqchip Tomasz Nowicki
2016-06-20 11:02 ` [PATCH V7 1/8] ACPI: I/O Remapping Table (IORT) initial support Tomasz Nowicki
2016-06-21  7:12   ` Hanjun Guo
2016-06-22 10:50     ` Marc Zyngier
2016-06-22 11:06       ` Tomasz Nowicki
2016-06-22 12:03         ` Marc Zyngier
2016-06-21 11:23   ` Lorenzo Pieralisi
2016-06-21 17:36   ` Lorenzo Pieralisi
2016-06-22 12:35   ` Tomasz Nowicki
2016-06-22 12:40     ` Tomasz Nowicki
2016-06-22 13:25     ` Marc Zyngier
2016-06-22 13:52       ` Tomasz Nowicki
2016-06-22 14:51         ` Marc Zyngier
2016-06-23  1:34           ` Hanjun Guo
2016-07-26 13:19             ` Christopher Covington
2016-07-26 14:48               ` Marc Zyngier
2016-06-20 11:02 ` [PATCH V7 2/8] ACPI: Add new IORT functions to support MSI domain handling Tomasz Nowicki
2016-06-21  7:28   ` Hanjun Guo
2016-06-20 11:02 ` [PATCH V7 3/8] PCI/MSI: Setup MSI domain on a per-device basis using IORT ACPI table Tomasz Nowicki
2016-06-21  7:33   ` Hanjun Guo
2016-07-19 21:42   ` Bjorn Helgaas
2016-06-20 11:02 ` [PATCH V7 4/8] irqchip/gicv3-its: Cleanup for ITS domain initialization Tomasz Nowicki
2016-06-21  7:44   ` Hanjun Guo
2016-06-20 11:02 ` [PATCH V7 5/8] irqchip/gicv3-its: Refactor ITS DT init code to prepare for ACPI Tomasz Nowicki
2016-06-20 11:02 ` [PATCH V7 6/8] irqchip/gicv3-its: Probe ITS in the ACPI way Tomasz Nowicki
2016-06-21  8:03   ` Hanjun Guo [this message]
2016-06-20 11:02 ` [PATCH V7 7/8] irqchip/gicv3-its: Factor out code that might be reused for ACPI Tomasz Nowicki
2016-06-20 11:02 ` [PATCH V7 8/8] irqchip/gicv3-its: Use MADT ITS subtable to do PCI/MSI domain initialization Tomasz Nowicki
2016-06-21  8:19   ` Hanjun Guo
2016-06-20 17:31 ` [PATCH V7 0/8] Introduce ACPI world to ITS irqchip Shanker Donthineni
2016-06-24 11:04 ` Tomasz Nowicki
2016-08-09 10:45 ` Robert Richter

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