From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDC2A42640A; Thu, 24 Sep 2026 10:59:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790247553; cv=none; b=lpvQ3QrsysekH4jkOY0Rqg32fhXX1MNmDH7tEh7abGNDV0lQ+XUs5/nXLlDB13ubGMrtR80WOV9M8XJsfGUi4IWJ9jZLuLSzlNmBysWnIQXpHdd2WD/Fk+THeyqOwcULX4gLQkfbR15SHyiT6Jz1yl9jAExr3Mk7p+eRos5Qztk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790247553; c=relaxed/simple; bh=uzm079J1Hlf4UO/zTSYNr5H1vLdGstH03V+hBqncpFQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Ua8Ow11GCbrTu6aWHgTxstmqhloXkTcRDQdjpEH+kwXxtZA2IvK4AUVCMcbpJ5wttrzCNB2Syc5O+ngLCR0sjiINC1xZurotpzllWtQM2DCktHy1jZh9DnQpteA55eidRdu3E7Z2iQeeeX3ZiPzjupbd74mH3qCGaGy4djfwDcI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DBTT30Dk; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DBTT30Dk" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6243F1F000FF; Thu, 24 Sep 2026 10:59:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1790247551; bh=D5/vhkqdn05EZKdDTNjLphM0V4tU0Hengbn8xFQ8pxo=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=DBTT30DkBr3++nyuGqz4WdPnHRNpHOZYe/t8dSkdxLWykopuqMMvkqKPLdiWoIlGQ P+p21Uiarm0LmC6hiqtLU7tKkEcRUGJRTp5EBlNMSIZ0WyBEj6p1SNgDgmXUq2g59X GJBUZv6J88+3mEMjvnaknkZM3jAhDJbqrHrTpGshP1ON7aEXKU8rVonp4IOsCeBBXT oppOCQ+lzIM6YSzKDgXRu24LIctlSIlhLjTjX94nyb+WRos0aLxgxnvAPeMCFOUxmy NjkjrdKsn44SdPMH4mtkxmbhpLgARi0rq8Tz0QGUHYOPiqy1cdvhaR09BvnkTarkGZ n9aV/yYWDKQ3A== Message-ID: Date: Thu, 24 Sep 2026 12:58:59 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 05/11] dt-bindings: clock: qcom: ipq5332-gcc: Describe clock inputs per compatible To: Kathiravan Thirumoorthy , Bjorn Andersson , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Georgi Djakov , Konrad Dybcio , Varadarajan Narayanan , Dmitry Baryshkov , Abel Vesa , Gokul Sriram Palanisamy , Sricharan Ramabadhran , Kathiravan T Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org References: <20260921-ipq_clk_changes-v1-0-d242e3d49648@oss.qualcomm.com> <20260921-ipq_clk_changes-v1-5-d242e3d49648@oss.qualcomm.com> <62a5fabc-3a06-42fa-9c6b-6504650e712b@kernel.org> <7bcffc7c-5dda-4ead-a053-7eb4980e43a4@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 24/09/2026 11:15, Kathiravan Thirumoorthy wrote: > > On 9/23/2026 2:17 PM, Krzysztof Kozlowski wrote: >> On 21/09/2026 08:19, Kathiravan Thirumoorthy wrote: >>> The IPQ5332 and IPQ5424 GCC blocks use different clock input orderings. >>> Document the clock inputs in compatible-specific schema constraints instead >>> of using a common clock description. >>> >>> Also add the 375 MHz PPE clock generated by the CMN PLL to the IPQ5424 >>> clock input list. >>> >>> This keeps the binding aligned with the clock ordering used by the >>> existing DTS and GCC driver implementations. >>> >>> Signed-off-by: Kathiravan Thirumoorthy >>> --- >>> .../bindings/clock/qcom,ipq5332-gcc.yaml | 26 +++++++++++++--------- >>> 1 file changed, 16 insertions(+), 10 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >>> index 1230183fc0a9..fb39dffca988 100644 >>> --- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >>> +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml >>> @@ -25,14 +25,7 @@ properties: >>> >>> clocks: >>> minItems: 5 >>> - items: >>> - - description: Board XO clock source >>> - - description: Sleep clock source >>> - - description: PCIE 2lane PHY pipe clock source >>> - - description: PCIE 2lane x1 PHY pipe clock source (For second lane) >>> - - description: USB PCIE wrapper pipe clock source >>> - - description: PCIE 2-lane PHY2 pipe clock source >>> - - description: PCIE 2-lane PHY3 pipe clock source >> >> You are changing the order which is ABI break. Describe the actual >> problem to justify such change. Are you saying this was broken since >> beginning or what exactly is not working here? The driver was added by >> Qualcomm in 2024, so how did it even work? It's not some 10 yo legacy >> where we did some mistakes in binding while converting from TXT. >> >> Also, I do not get why the list cannot be shared. > > When the bindings was posted, list is combined for both IPQ5332 and > IPQ5424. But the driver wasn't updated and it was following the below > order, so was DTS, which is not compatible the DT binding description. > > enum { >         DT_XO, >         DT_SLEEP_CLK, >         DT_PCIE30_PHY0_PIPE_CLK, >         DT_PCIE30_PHY1_PIPE_CLK, >         DT_PCIE30_PHY2_PIPE_CLK, >         DT_PCIE30_PHY3_PIPE_CLK, >         DT_USB_PCIE_WRAPPER_PIPE_CLK, >         DT_CMN_PLL_NSS_375M_CLK, > }; > > So I'm splitting the description between IPQ5332 and IPQ5424 to matching > with the DTS and the driver description. So we asked back in 2024 to have the common part of the list. I even did the effort to dig it: https://lore.kernel.org/all/ruti7hmkxkayzmqfbme6rw6j2vbhlx4ul4ptcckwamcpd4cyfx@owufhxwpvlcj/ Authors implemented it partially, broken drivers. Now you basically revert what we asked, which is BTW logical option. It's logical and reasonable, but leaves bitter feeling. I have feeling there is no accountability and no responsibility of the IPQ at all. No, that's not going to work. You cannot come 1.5 year later and revert what reviewer asked you, even if issue was just by mistake in the first place. And you should not even try to do that. NAK Best regards, Krzysztof