Re: [PATCH v5 5/6] arm64: dts: ti: k3-j784s4-j742s2-ti-ipc-firmware-common: Reserve memory for LPM metadata

["Kumar, Udit" <u-kumar1@ti.com>]

On 10/21/2026 1:39 PM, Richard Genoud (TI) wrote:
> Declare a carveout memory region to store LPM metadata on J784S4 and
> J742S2.
> 
> For Jacinto devices, this memory region is needed for saving ATF context
> and the certificate information of ATF and OPTEE and DM image. This LPM
> metadata area is firewalled to be accessed only by TIFS.
> 
> U-Boot R5 SPL/TIFS will use this area to save and restore:
> - ATF context
> - ATF certificate information
> - OPTEE certificate information
> - DM image (which has been copied in memory at boot time by U-Boot
>   R5-SPL)
> 
> At resume, U-Boot R5 SPL is executed and detects that the board is
> resuming (with a flag set in the PMIC), then it:
> - brings out of retention the DDR
> - retrieves the LPM memory region from DTS
> - authenticates certificates from LPM memory region and applies firewalls
> - asks TIFS to restore TFA and its own minimal context
> - starts TFA on remote proc
> - loads back DM image from memory and jumps to DM
> 
> https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#lpm-msg-lpm-save-addr
> 
> As this is used by U-Boot SPL, bootph-pre-ram is added.
> 
> NB: This memory region is not part of DM memory (which is not retained
> at suspend)
> 
> Suggested-by: Udit Kumar <u-kumar1@ti.com>
> Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
> Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
> ---
>  .../ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi  | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> index d08fd3ff8a89..51b2d11ab5d6 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-ti-ipc-firmware-common.dtsi
> @@ -6,6 +6,12 @@
>   */
>  
>  &reserved_memory {
> +	lpm_memory_region: memory@9e500000 {
> +		reg = <0x00 0x9e500000 0x00 0x00300000>;
> +		no-map;
> +		bootph-pre-ram;
> +	};
> +
>  	mcu_r5fss0_core1_dma_memory_region: memory@a1000000 {
>  		compatible = "shared-dma-pool";
>  		reg = <0x00 0xa1000000 0x00 0x100000>;
> @@ -261,8 +267,10 @@ &mcu_r5fss0_core0 {
>  	status = "okay";
>  	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
>  	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> -			<&mcu_r5fss0_core0_memory_region>;
> -	memory-region-names = "dma", "firmware";
> +			<&mcu_r5fss0_core0_memory_region>,
> +			<&lpm_memory_region>;
> +	memory-region-names = "dma", "firmware", "lpm-metadata";
> +	bootph-pre-ram;


Reviewed-by: Udit Kumar <u-kumar1@ti.com>


>  };
>  
>  &mcu_r5fss0_core1 {