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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2025 16:47:52.6865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dff4cbd8-a4d1-410b-245c-08ddfb8a1aa1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB73.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6562 There is a patch for this. https://lore.kernel.org/dmaengine/20250903-xdma-max-reg-v4-1-894721175025@amarulasolutions.com/ Thanks, Lizhi On 9/24/25 05:59, Alexander Stein wrote: > max_register specifies the last valid register address. As the BAR is only > 64kiB in size, 65536 aka 0x10000 is too big. Restrict the XDMA register > space to be actually 64kiB. > > Fixes: 17ce252266c7 ("dmaengine: xilinx: xdma: Add xilinx xdma driver") > Signed-off-by: Alexander Stein > --- > drivers/dma/xilinx/xdma-regs.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/dma/xilinx/xdma-regs.h b/drivers/dma/xilinx/xdma-regs.h > index 6ad08878e9386..c6ef198ef7627 100644 > --- a/drivers/dma/xilinx/xdma-regs.h > +++ b/drivers/dma/xilinx/xdma-regs.h > @@ -8,7 +8,7 @@ > #define __DMA_XDMA_REGS_H > > /* The length of register space exposed to host */ > -#define XDMA_REG_SPACE_LEN 65536 > +#define XDMA_REG_SPACE_LEN 0xffff > > /* > * maximum number of DMA channels for each direction: