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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-343eac9864dsm1174018a91.3.2025.11.13.02.03.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 13 Nov 2025 02:03:40 -0800 (PST) Message-ID: Date: Thu, 13 Nov 2025 18:03:33 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] dt-bindings: mfd: qcom,tcsr: Add compatible for Kaanapali To: Bjorn Andersson Cc: Konrad Dybcio , Jingyi Wang , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com, yijie.yang@oss.qualcomm.com References: <20250924-knp-mfd-v1-1-6c8a98760e95@oss.qualcomm.com> <01de9616-825b-4fbb-83cf-e0bf91e8cf39@oss.qualcomm.com> <81174278-c3c4-4dc6-856e-b58aa2cb6fea@oss.qualcomm.com> From: "Aiqun(Maria) Yu" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: dOmK4-f3SLBvdJcvXYPUtsMzZK53WNWc X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTEzMDA3MiBTYWx0ZWRfX9gGquwnexbmP tzN+X84ijwNRwLgCFCzu72CJrNQLsz4SRoNEqaqs70it4dvy8X2JEQ8Y/rwf2bp9gSO8Ur29SAv x0mzONnHAolpWLfWkjWm4Fu+mIrsI5cF5Xx6L/iSgl9PsyNo9cG7kG73ywQKtpB1x53f3jSpmbo sYwhInYFEhbVLp4ZPLHNPpI4n/k0wOEMuO4YBgmCqNvRIzEu/Q46K7AjUOrkotWPgR79ztHYN+g hoddjgSazhkYgP/VH2XeH5+N1v1AFqFui5UqDDmUlT3LJCThIoxjEs92N000nJn2NarqDzJO7gV d4wtcuQaMQ20HfKZTO0J5i6CfYqJrtTzD0JZQCLOfjgEGQZ2hiQ26uSn+511Cvyd2VMOFmCmcVL 8ykqW2KrFfO5t9azc+noaBTRQsX5JA== X-Authority-Analysis: v=2.4 cv=F+Bat6hN c=1 sm=1 tr=0 ts=6915acff cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=UpH33N9-BHK6NiP4hkQA:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 X-Proofpoint-GUID: dOmK4-f3SLBvdJcvXYPUtsMzZK53WNWc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-13_01,2025-11-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 malwarescore=0 phishscore=0 bulkscore=0 adultscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511130072 On 11/12/2025 12:05 AM, Bjorn Andersson wrote: > On Tue, Nov 11, 2025 at 08:27:17PM +0800, Aiqun(Maria) Yu wrote: >> On 11/7/2025 12:24 AM, Konrad Dybcio wrote: >>> On 11/6/25 11:16 AM, Aiqun(Maria) Yu wrote: >>>> On 11/6/2025 5:06 AM, Bjorn Andersson wrote: >>>>> On Tue, Nov 04, 2025 at 01:35:01PM +0800, Jingyi Wang wrote: >>>>>> >>>>>> >>>>>> On 11/4/2025 12:02 PM, Bjorn Andersson wrote: >>>>>>> On Tue, Nov 04, 2025 at 11:34:25AM +0800, Aiqun(Maria) Yu wrote: >>>>>>>> On 9/25/2025 7:23 AM, Jingyi Wang wrote: >>>>>>>>> Document the qcom,tcsr-kaanapali compatible, tcsr will provide various >>>>>>>>> control and status functions for their peripherals. >>>>>>>>> >>>>>>>>> Signed-off-by: Jingyi Wang >>>>>>>>> --- >>>>>>>>> Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml | 1 + >>>>>>>>> 1 file changed, 1 insertion(+) >>>>>>>>> >>>>>>>>> diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml >>>>>>>>> index 14ae3f00ef7e..ae55b0a70766 100644 >>>>>>>>> --- a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml >>>>>>>>> +++ b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml >>>>>>>>> @@ -48,6 +48,7 @@ properties: >>>>>>>>> - qcom,tcsr-ipq8064 >>>>>>>>> - qcom,tcsr-ipq8074 >>>>>>>>> - qcom,tcsr-ipq9574 >>>>>>>>> + - qcom,tcsr-kaanapali >>>>>>>> >>>>>>>> It looks good to me. Glymur didn't have this functionality verified yet. >>>>>>> >>>>>>> You spelled Reviewed-by: Aiqun Yu <..> wrong. >>>>>>> >>>>>>>> Remind for review. >>>>>>> >>>>>>> No need for that, reviewers will review when they have time. >>>>>>> >>>>>>>> >>>>>> >>>>>> Hi Bjorn, >>>>>> >>>>>>> >>>>>>> But that said, most modern additions to this binding follow the common >>>>>>> format of qcom,-. >>>>>>> >>>>>>> So I would prefer this to be qcom,kaanapali-tcsr. >>>>>>> >>>>>>> Regards, >>>>>>> Bjorn >>>>>>> >>>>>> >>>>>> qcom,tcsr-kaanapali is used to distinguish with binding for GCC: >>>>>> https://lore.kernel.org/all/20251030-gcc_kaanapali-v2-v2-2-a774a587af6f@oss.qualcomm.com/ >>>>>> >>>>> >>>>> So, qcom,kaanapali-tcsr is the clock controller region of TCSR and >>>>> qcom,tcsr-kaanapali is the non-clock controller region of TCSR? >>>>> >>>>> Sorry for not understanding that earlier, but this doesn't work for me. >>>>> >>>>> It's a bit of a lie that TCSR_MUTEX is a separate node in devicetree, >>>>> but it's always an nice chunk of 256K in the beginning (or end in some >>>>> cases?) of TCSR. But for the rest, there should be a single tcsr node in >>>>> DeviceTree and that one node should be a syscon and a clock controller. >>>> >>>> I've been dive deeply on this tcsr block. And actually the tcsr clock >>>> controller part is a very small trunk size(0x1c) of the tcsr block. And >>>> this block have contain other multiple purposed sys registers. So maybe >>>> we can have a more discussion on how to have device tree node describe >>>> this situation? It is not straight forward that to have a non-tcsrcc >>>> related area being described in tcsrcc. >>>> >>>> What about option 1 (tcsr_mutex + tcsr_dload_syscon + tcsrcc):>> tcsr_mutex: hwlock@1f40000 { >>>> compatible = "qcom,tcsr-mutex"; >>>> reg = <0x0 0x01f40000 0x0 0x20000>; >>>> #hwlock-cells = <1>; >>>> }; >>>> >>>> tcsr_dload: syscon@1fc0000 { >>>> compatible = "qcom,tcsr-kaanapali", "syscon"; >>>> reg = <0x0 0x1fc0000 0x0 0x30000>; >>>> }; >>>> >>>> tcsrcc: clock-controller@1fd5044 { >>>> compatible = "qcom,kaanapali-tcsr", "syscon"; >> >> Remove "syscon" here. Not need for tcsrcc fallback to "syscon". >> >>>> reg = <0x0 0x01fd5044 0x0 0x1c>; >>>> ... >>>> }; >>>> >>>> What about option 2 (tcsr whole block + tcsr_mutex + tcsrcc): >>>> >>>> tcsr: syscon@1f40000 { >>>> compatible = "qcom,tcsr-kaanapali", "syscon"; >>>> reg = <0x0 0x1f40000 0x0 0xC0000>; //align with the whole hardware >>>> block design. >>>> }; >>>> >>>> tcsr_mutex: hwlock@1f40000 { >>>> compatible = "qcom,tcsr-mutex"; >>>> reg = <0x0 0x01f40000 0x0 0x20000>; >>>> #hwlock-cells = <1>; >>>> }; >>>> >>>> tcsrcc: clock-controller@1fd5044 { >>>> compatible = "qcom,kaanapali-tcsr", "syscon"; >> >> Same here, don't need to have "syscon" here. >> >>>> reg = <0x0 0x01fd5044 0x0 0x1c>; >>>> ... >>>> }; >>> >>> Is there anything wrong with what we have done for x1e80100? >>> ______________________ >>> | | | >>> | TCSR_MUTEX | mutex | >>> |_____________|_______| >>> | | | >>> | RANDOM_REGS | | >>> |_____________| | >>> | | | >>> | TCSR_CLKS | tcsr | >>> |_____________| | >>> | | | >>> | RANDOM_REGS | | >>> |_____________|_______| >>> >> >> Second you! We can firstly have a option selected for kaanapali, and >> then other platform can be followed or fixed afterwards. >> >> Here suggest to have option 2 which is remove "syscon" from tcsr clocks, >> and only add the whole "syscon" to "tcsr" whole block. >> > > I think you misunderstood Konrad, or perhaps I misunderstand you. Maybe let Konrad help to explain more here. I thought the chart below is very clearly indicate the tcsr_clks is only part of the tcsr block. > > This is what we have for Hamoa: > > tcsr_mutex: hwlock@1f40000 { > compatible = "qcom,tcsr-mutex"; > reg = <0 0x01f40000 0 0x20000>; > #hwlock-cells = <1>; > }; > > tcsr: clock-controller@1fc0000 { It is not a clock-controller start from 0x1fc0000. > compatible = "qcom,x1e80100-tcsr", "syscon"; > reg = <0 0x01fc0000 0 0x30000>; This is what we have a discussion initialized here: "qcom,-tcsr" is only a tcsr clock controller binder, reference from [1]. "qcom,tcsr-" is a common tcsr block. reference current binding patch. For below hardware block information, is it really a recommendation to combine the tscr block with tcsr clock controller all together? ______________________ | | | | TCSR_MUTEX | mutex | |_____________|_______| | | | | RANDOM_REGS | | |_____________| | | | | | TCSR_CLKS | tcsr | |_____________| | | | | | RANDOM_REGS | | |_____________|_______| [1]https://lore.kernel.org/all/20251030-gcc_kaanapali-v2-v2-2-a774a587af6f@oss.qualcomm.com/ > clocks = <&rpmhcc RPMH_CXO_CLK>; > #clock-cells = <1>; > #reset-cells = <1>; > }; > > This is exactly what I suggested above and Konrad is asking you why > this doesn't work for Kaanapali. The addresses are even the same, what > is the problem? The problem is the current patchset document a separate tcsr block as a mfd. While the suggestion here is to use the tcsr clock controller binding to document the whole tcsr block which is not belonged to tcsr clock controller. > > Regards, > Bjorn > >>> >>> 8750 was different because someone decided to stick the "TCSR clocks" >>> into the TLMM address space, but it was a one-off >>> >>> Konrad >> >> >> -- >> Thx and BRs, >> Aiqun(Maria) Yu -- Thx and BRs, Aiqun(Maria) Yu