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Fri, 20 Mar 2026 06:18:09 -0700 (PDT) X-Received: by 2002:a05:6a21:3295:b0:398:8766:4d0a with SMTP id adf61e73a8af0-39bce9c06d7mr2867236637.19.1774012688756; Fri, 20 Mar 2026 06:18:08 -0700 (PDT) Received: from [192.168.1.8] ([106.222.229.133]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c74487b5b8csm1872880a12.31.2026.03.20.06.18.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Mar 2026 06:18:08 -0700 (PDT) Message-ID: Date: Fri, 20 Mar 2026 18:48:02 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: qcs6490-rb3gen2: Enable CAN bus controller To: Marc Kleine-Budde Cc: mani@kernel.org, thomas.kopp@microchip.com, mailhol@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org, konradybcio@kernel.org, linux-can@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, mukesh.savaliya@oss.qualcomm.com, anup.kulkarni@oss.qualcomm.com References: <20260316131950.859748-1-viken.dadhaniya@oss.qualcomm.com> <20260316131950.859748-4-viken.dadhaniya@oss.qualcomm.com> <20260316-garrulous-saluki-of-advertising-b0a726-mkl@pengutronix.de> Content-Language: en-US From: Viken Dadhaniya In-Reply-To: <20260316-garrulous-saluki-of-advertising-b0a726-mkl@pengutronix.de> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=F95at6hN c=1 sm=1 tr=0 ts=69bd4912 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=cGBE/nqsz5+qsjWdF/9VHQ==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=LcWsMGrysshWCZgQONgA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: V4pqyxaXLWOvcWewZyJdfXw-BpCd-MzN X-Proofpoint-ORIG-GUID: V4pqyxaXLWOvcWewZyJdfXw-BpCd-MzN X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzIwMDEwNSBTYWx0ZWRfX8KzVWLADAf9P 5E7UvfY39FAFgtKwjsmoJiROPRAhDff9IU18I8POm109fjO0qTmR93Dt6hRld6zurN7g3m2TfE8 osEb+pS8GGFmIje7vn3h9UjkjTtDx9gO9JQX4OuabpAHsHsT1eDggc3QP53365xV6um3WiF1pr7 Ti6kpfAOHItDTzIOlmEySea1r9FwY9mt43cBszcsq2zc5LB+YOGax5izJV3VNP9nLLgX68dnY5f aO6xc6JBfps/xfvD69R/GpUvvIKzbe8JWDP7TiqJ4w9IhUj/vcQ3CYpzLfarjZJsg+mlvMS3BgZ WPuK6iuHSix4T2KzmpiFq4efv+LJtwUF8rttJgTeNvhzTn1UYDJs09D2WyMNDc726frxrKlH3uS 3fdCpaWAA1HKlsEB2/9/0auqo87c0B6YLQ8oMu+9TXKYWeG4PSkKFdxuSvAQMty1u65FTjPU2T2 NcrJv2TqlDgjRw7JWqQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-20_02,2026-03-19_05,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 spamscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 suspectscore=0 adultscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603200105 On 3/16/2026 6:59 PM, Marc Kleine-Budde wrote: > On 16.03.2026 18:49:50, Viken Dadhaniya wrote: >> Enable the MCP2518FD CAN controller on the QCS6490 RB3 Gen2 platform. >> The controller is connected via SPI3 and uses a 40 MHz oscillator. >> >> The setup was tested with CAN-FD loopback and actual data transfer >> using an external PCAN-USB FD adapter. > > IIRC a board DT update should go independent of the driver update. Sure, I will send the device tree changes separately. > >> Signed-off-by: Viken Dadhaniya >> --- >> v1 -> v2: >> >> - Drop the gpio-hog property. >> - Add the microchip,xstbyen property to enable transceiver standby control. >> >> v1 Link: https://lore.kernel.org/all/20260108125200.2803112-3-viken.dadhaniya@oss.qualcomm.com/ >> --- >> --- >> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 22 ++++++++++++++++++++ >> 1 file changed, 22 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> index e3d2f01881ae..245961722f84 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> @@ -44,6 +44,14 @@ chosen { >> stdout-path = "serial0:115200n8"; >> }; >> >> + clocks { >> + mcp2518fd_osc: can-clk { >> + compatible = "fixed-clock"; >> + clock-frequency = <40000000>; >> + #clock-cells = <0>; >> + }; >> + }; >> + >> dp-connector { >> compatible = "dp-connector"; >> label = "DP"; >> @@ -1151,6 +1159,20 @@ platform { >> }; >> }; >> >> +&spi3 { >> + status = "okay"; >> + >> + can@0 { >> + compatible = "microchip,mcp2518fd"; >> + reg = <0>; >> + interrupts-extended = <&tlmm 7 IRQ_TYPE_LEVEL_LOW>; >> + clocks = <&mcp2518fd_osc>; >> + spi-max-frequency = <10000000>; > > Why do you limit the frequency to 10 MHz? Is this a HW limitation? > > With a 40 MHz clock the chip supports up to 17 MHz (not 20 MHz due to > the erratum). The 10 MHz was overly conservative. Testing on this board shows: spi-max-frequency = <14000000>: actual SCK = 12.8 MHz => OK spi-max-frequency = <15000000>: actual SCK = 15.0 MHz => FAIL Any SCK >= 14.7 MHz fails to initialize the MCP251xFD on this board, so 12.8 MHz is the highest reliable SCK within the erratum limit of 17 MHz. Will update to spi-max-frequency = <14000000>. > > Marc >