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From: Vasant Hegde <vasant.hegde@amd.com>
To: Jason Gunthorpe <jgg@nvidia.com>
Cc: Pranjal Shrivastava <praan@google.com>,
	iommu@lists.linux.dev, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, Joerg Roedel <joro@8bytes.org>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Ankit Soni <ankit.soni@amd.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Samiullah Khawaja <skhawaja@google.com>,
	sashiko-bot@kernel.org
Subject: Re: [PATCH v3 2/5] iommu/amd: Fix DTE clearing and rename iommu_ignore_device()
Date: Fri, 28 Aug 2026 10:46:48 +0530	[thread overview]
Message-ID: <bfb7be5b-2da3-4bd3-8146-9bd079011a75@amd.com> (raw)
In-Reply-To: <20260826122147.GA3666382@nvidia.com>



On 8/26/2026 5:51 PM, Jason Gunthorpe wrote:
> On Wed, Aug 26, 2026 at 04:58:15PM +0530, Vasant Hegde wrote:
>> Pranjal,
>>
>>
>> On 8/26/2026 12:38 AM, Pranjal Shrivastava wrote:
>>> On Tue, Aug 25, 2026 at 02:53:15PM -0300, Jason Gunthorpe wrote:
>>>> On Tue, Aug 25, 2026 at 05:29:59PM +0000, Pranjal Shrivastava wrote:
>>>>
>>>>> I agree, but I wonder why the existing code used memset here 
>>>>> (in ignore_device):
>>>>>
>>>>> memset(&dev_table[devid], 0, sizeof(struct dev_table_entry));
>>>>>
>>>>> I was thinking it might've been done for probe failures in a kdump
>>>>> kernel (normal kexec would've called shutdown for clearing all DTEs).
>>>>> (I see this was added long time back and existed when PCI segments were
>>>>> added [1]).
>>>>
>>>> For kdump you'd want to keep the original translation running in this
>>>> case.
>>
>> If probe is failed then we can't do much. Why keep original translation running?
> 
> It might cause the kdump to fail if you abruptly change the DTE. The
> kdump semantics are to leave the DTE unchanged until a defered attach
> event. An error flow should not defeat that.

Since probe is failed we are not going to attach device again.


> 
> It was already running when probe fails, it can keep going.
> 
> The memset doesn't even work since it doesn't flush the DTE cache, it
> isn't going to actually change any active transfer with a cache hit
> DTE anyhow.

Yeah. We can keep it as is and it can keep going.

> 
>>> Even I'm not sure why we had this memset here, I'll just dig into
>>> the history once if there's anything. Otherwise, I'll simply drop this.
>>>
>>> Vasant, please let us know if there was a different context to it?
>>
>> Looking into git history, it looks like, during boot init_device_table_dma()
>> sets dte.v bit for all devices. So probe fails then clear everything in DTE.
> 
> That isn't how a secure'd iommu driver should boot..
> 
> In a secure boot flow (eg DRTM or something with untrusted PCI) the FW
> will leave the iommu setup to block dma when booting the OS. The OS
> should then ensure that it never permits an identity mapping as it
> boots up the iommu.
> 
> Having the driver boot up with all DTEs programmed to identity (eg
> 0'd) and then try to fix them to blocking after the iommu probes
> devices is security backwards.


During boot, it only sets dte.v bit. For DMA to work we have to set dte.tv bit
that's done in set_dte_entry. So it doesn't break the security.


> 
> Look at how ARM sequences it, the stream table (aka DTEs) are fully
> configured before programming to HW. First it loads force blocking
> then it does a pass to switch those with IOMMU_RESV_DIRECT to identity
> (see arm_smmu_rmr_install_bypass_ste), then it tells the HW to
> hitlessly switch from the FW configuration to the table. Ensuring no
> device that shouldn't has even a moment of identity access.
> 
> Since these secure boots have become very trendy now, I saw AMD PR
> about their version, this should probably be fixed! :)

Yep! We have secure vIOMMU prototype. We want to start discussion once hw-viommu
series settles.

-Vasant


  reply	other threads:[~2026-08-28  5:16 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-24 12:23 [PATCH v3 0/5] iommu/amd: Refactors for ATS robustness Pranjal Shrivastava
2026-08-24 12:23 ` [PATCH v3 1/5] iommu/amd: Refactor device probe and capability initialization Pranjal Shrivastava
2026-08-24 18:13   ` Jason Gunthorpe
2026-08-25 10:24     ` Pranjal Shrivastava
2026-08-25 11:50       ` Jason Gunthorpe
2026-08-25  6:59   ` Vasant Hegde
2026-08-25 10:25     ` Pranjal Shrivastava
2026-08-24 12:23 ` [PATCH v3 2/5] iommu/amd: Fix DTE clearing and rename iommu_ignore_device() Pranjal Shrivastava
2026-08-24 18:13   ` Jason Gunthorpe
2026-08-25 10:32     ` Pranjal Shrivastava
2026-08-25 11:49       ` Jason Gunthorpe
2026-08-25 17:29         ` Pranjal Shrivastava
2026-08-25 17:53           ` Jason Gunthorpe
2026-08-25 19:08             ` Pranjal Shrivastava
2026-08-26 11:28               ` Vasant Hegde
2026-08-26 12:21                 ` Jason Gunthorpe
2026-08-28  5:16                   ` Vasant Hegde [this message]
2026-08-28 11:53                     ` Jason Gunthorpe
2026-08-24 21:47   ` Samiullah Khawaja
2026-08-25  7:01   ` Vasant Hegde
2026-08-24 12:23 ` [PATCH v3 3/5] iommu/amd: Split probe error paths to preserve IRQ remapping Pranjal Shrivastava
2026-08-24 18:13   ` Jason Gunthorpe
2026-08-25 10:34     ` Pranjal Shrivastava
2026-08-24 12:23 ` [PATCH v3 4/5] iommu/amd: Fail probe on ATS configuration failure Pranjal Shrivastava
2026-08-24 18:13   ` Jason Gunthorpe
2026-08-24 21:46   ` Samiullah Khawaja
2026-08-24 12:23 ` [PATCH v3 5/5] PCI/ATS: Mandate checking pci_ats_supported() before pci_prepare_ats() Pranjal Shrivastava
2026-08-24 18:13   ` Jason Gunthorpe
2026-08-24 18:13 ` [PATCH v3 0/5] iommu/amd: Refactors for ATS robustness Jason Gunthorpe
2026-08-25 10:39   ` Pranjal Shrivastava
2026-08-25 11:51     ` Jason Gunthorpe
2026-08-25  7:06 ` Vasant Hegde
2026-08-25 10:37   ` Pranjal Shrivastava

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