From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.remote-ip=100.103.45.18 ARC-Seal: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; cv=none; t=1794553521; b=CiCA6cy1UGlmleOMSwnF0X3ljVz7hqa2BsEXG8jbUShBRmqq/QVVra4VCtmdiHV1PEek KA0Eoc+5Jq/jEb5zNcmm/XdHvlezihUV3fSVc9Pnq88TB7pRPXWfw3tADaS0pIyp1pDP6 lQCyGpborXYVPqtx7l7SUJ3Yb2+0fHwVFBzHGuSok5HudSEA8cu+Ht038AyW0rIC4QOAt 8KX2hXS+1hS68WLLChgvklDWxZi3BVVCCz4fHRCKd8Bmxg9WKMgGFpBBDerlufn4XP/R/ 9tY79QHpSzPNBNung7qTmgGFDUjWKE/eGvq6wp0ytiP+3NNxTBe36NY2Ocdy/L4XUjg== ARC-Message-Signature: i=1; d=subspace.kernel.org; s=arc20261015; a=rsa-sha256; c=relaxed/relaxed; t=1794553521; h=Received:DKIM-Signature:Message-ID:Date:MIME-Version:User-Agent: Subject:To:Cc:References:From:Content-Language:Autocrypt:In-Reply-To: Content-Type:Content-Transfer-Encoding; bh=ZGwvow9q146QrQxGFF94/REs6kziVPudCIH7akxXQI4=; b=iyNP3A7dCjKmkRS6xQ11DYmPJO9JhWPhKyOgGqZOMe4r0Ymcam0VsJ59R4MuWWWeNndT cKvNbDvQAAczTbOmeSJoiGZRqWyBeqfG6SEuTMWrJg7mjRH/h/2+jotvXLNQxBU45zVSr z7lmGlRlz0aAccYuO4waxY32hdLpzzdEenZ/xdnwpyIY/guyJGnrGcL0xdJa71xtysUV9 VREqlvmt+OHsA+wJMwLzpDYADXhnHYot/F2A121QP/Br5zR3eO9LcJcIyidDbGeQv2Lna mV13i4Iy295ZVcyYpe7FWMwrrLTAkzY6VPIgzdznBW1Cb4ryqXUMGj663WYasdyogDQ== ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=d4BwR1eJ; arc=none smtp.remote-ip=100.103.45.18 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B5BF606A31C; Fri, 13 Nov 2026 07:05:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20260515 header.b=d4BwR1eJ Received: by smtp.kernel.org (Postfix) with ESMTPSA id 866BD1F000C4; Fri, 13 Nov 2026 07:05:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1794553520; bh=ZGwvow9q146QrQxGFF94/REs6kziVPudCIH7akxXQI4=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=d4BwR1eJMxvjighF77x7JTzhqoiGQPUF6FHHIBbPR5WbbAx2Kcvkznoy9Hrfv0sxa K0/l4ro4GD6S5i0ZuAkz9PfQ6lqnIMMfwcS8Kpo1ugc3DO0+ksLv/3WaN43HrfySwn uStrR/O7yMCeNOxJITbkuJR+q0grxoSjwNoyMfIIfJv0D1eQIr7W2jnY++ZXmOkt+4 zXm5xGXok4yOEUoU3k2o1Oo6aoiX7/sQc0x8OwPucfeFRfm1V8diLRCvqKrUhqgfPc AR5mhoti5hcVIBjN772j1MTzKEDihkmdflFxyiup1TVqEt2950witCJYYnys4O+MD1 Zk9cqmPhuVVxA== Message-ID: Date: Fri, 13 Nov 2026 08:05:13 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/10] dt-bindings: ptp: Document TSCSS hardware on Qualcomm QDU1000 SoC To: Imran Shaik Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Andrew Lunn , "David S. Miller" , Jakub Kicinski , Paolo Abeni , Bjorn Andersson , Konrad Dybcio , Eric Dumazet , Abel Vesa , Ajit Pandey , Taniya Das , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org References: <20261108-tscss-v2-0-d5f575010427@oss.qualcomm.com> <20261108-tscss-v2-2-d5f575010427@oss.qualcomm.com> <20261109-sticky-caiman-of-research-65e9a4@quoll> <28202f96-f234-4c7c-be6b-3019e119bb0a@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; keydata= xsFNBFVDQq4BEAC6KeLOfFsAvFMBsrCrJ2bCalhPv5+KQF2PS2+iwZI8BpRZoV+Bd5kWvN79 cFgcqTTuNHjAvxtUG8pQgGTHAObYs6xeYJtjUH0ZX6ndJ33FJYf5V3yXqqjcZ30FgHzJCFUu JMp7PSyMPzpUXfU12yfcRYVEMQrmplNZssmYhiTeVicuOOypWugZKVLGNm0IweVCaZ/DJDIH gNbpvVwjcKYrx85m9cBVEBUGaQP6AT7qlVCkrf50v8bofSIyVa2xmubbAwwFA1oxoOusjPIE J3iadrwpFvsZjF5uHAKS+7wHLoW9hVzOnLbX6ajk5Hf8Pb1m+VH/E8bPBNNYKkfTtypTDUCj NYcd27tjnXfG+SDs/EXNUAIRefCyvaRG7oRYF3Ec+2RgQDRnmmjCjoQNbFrJvJkFHlPeHaeS BosGY+XWKydnmsfY7SSnjAzLUGAFhLd/XDVpb1Een2XucPpKvt9ORF+48gy12FA5GduRLhQU vK4tU7ojoem/G23PcowM1CwPurC8sAVsQb9KmwTGh7rVz3ks3w/zfGBy3+WmLg++C2Wct6nM Pd8/6CBVjEWqD06/RjI2AnjIq5fSEH/BIfXXfC68nMp9BZoy3So4ZsbOlBmtAPvMYX6U8VwD TNeBxJu5Ex0Izf1NV9CzC3nNaFUYOY8KfN01X5SExAoVTr09ewARAQABzSVLcnp5c3p0b2Yg S296bG93c2tpIDxrcnprQGtlcm5lbC5vcmc+wsGPBBMBCgA5AhsDBgsJCAcDAgYVCAIJCgsE FgIDAQIeAQIXgBYhBJvQfg4MUfjVlne3VBuTQ307QWKbBQJp2mE8AAoJEBuTQ307QWKbeaIP /ihHTkTW4KsN/DQ945JJbyu5tI0J80Wue7QyyLPglyKfhgb5cLLNPpOC8cCIJsc7+W3i2P38 s2c1cOH6CYGE7E9ur3Vfme8NW2S2I/Z8VC7bZnzyS23wT17LrsdS/qCpx4o8U+pt/xdXDKph EGRYrIEmMpUWvyYzyYKGIe25FtaayIIKpq8eZYyFcp2f/sG5IkOW5uZzHPMPdcm87jU7fyuQ rAU2vx9r+ulUfQ/q9Z2roC/ode3l7t2pN7BCBCsUDp6JCrUyZrtT1e7EbA0ZRP3aOBNk2P2E DQOgJGjGdO5Yx2Y9LFtltu6JbsBJHi1syGRX3AtQYOMc4Y1WGoeZJmMlvKj2ZqqXNkcWi2DS IQEWB0uW6CqFsBBIMGDa+6OzdaVO/uAVXWDWml02Men3CILdI1MbVjoh8ECqYUY7OQ+JJvNN vnliuq5WM3Ghd3jg/LZZrxXjdIginRHFQCjIJYLKpLZWm1/iDFedcfzqRNYmTtqscdCNHW41 oT3Z7BmO9xwdjuwBS6nmS6JJwkbf5Ot2QR4pB/DRU7ZwjT1qHe+9r9gF32wXVQatHNGK/VVu sfwOnkdxCWkp/qb2gdQRmZh+SedStWshigH6sNfuHBloF/q+hjMRc8b2m326OZdrbSHwY1Sz vti8Hn7n8NjdHO9LKB7BIdjkA9DA5WsqOuVCzsFNBFVDXDQBEADNkrQYSREUL4D3Gws46JEo Z9HEQOKtkrwjrzlw/tCmqVzERRPvz2Xg8n7+HRCrgqnodIYoUh5WsU84N03KlLueMNsWLJBv BaubYN4JuJIdRr4dS4oyF1/fQAQPHh8Thpiz0SAZFx6iWKB7Qrz3OrGCjTPcW6eiOMheesVS 5hxietSmlin+SilmIAPZHx7n242u6kdHOh+/SyLImKn/dh9RzatVpUKbv34eP1wAGldWsRxb f3WP9pFNObSzI/Bo3kA89Xx2rO2roC+Gq4LeHvo7ptzcLcrqaHUAcZ3CgFG88CnA6z6lBZn0 WyewEcPOPdcUB2Q7D/NiUY+HDiV99rAYPJztjeTrBSTnHeSBPb+qn5ZZGQwIdUW9YegxWKvX XHTwB5eMzo/RB6vffwqcnHDoe0q7VgzRRZJwpi6aMIXLfeWZ5Wrwaw2zldFuO4Dt91pFzBSO IpeMtfgb/Pfe/a1WJ/GgaIRIBE+NUqckM+3zJHGmVPqJP/h2Iwv6nw8U+7Yyl6gUBLHFTg2h YnLFJI4Xjg+AX1hHFVKmvl3VBHIsBv0oDcsQWXqY+NaFahT0lRPjYtrTa1v3tem/JoFzZ4B0 p27K+qQCF2R96hVvuEyjzBmdq2esyE6zIqftdo4MOJho8uctOiWbwNNq2U9pPWmu4vXVFBYI GmpyNPYzRm0QPwARAQABwsF2BBgBCgAgAhsMFiEEm9B+DgxR+NWWd7dUG5NDfTtBYpsFAmna YUkACgkQG5NDfTtBYptX+BAApg32CkxwNucNEi8WfWA8oKkW0y8YDuY6ORMo9FWNGiT/OTy0 vyJrLocrpn86zwfjVp+eCrssPYh8eqJfnWqmYv6ACQtHPYzPZQ3mSo8H97Z01oUxITzCxpXm ZkLgPIqtDPcC2E3dPM/fVxcyowM8XsaMA9wcsaUYrta8toOq2b9tKcjleKMfMrm0gQ9u7wUc QbLkwj6TCLOwucb07GXzLTNF9PZmaDUpKAZjMjmrW+le+SFvQbhamx0rxLWPR0NWntXpbCn+ +ACch03p/JyTBVktxFsFyCt7pTPE1kEaeuXBTe/a2D9iQvRxRW19LvuO2e59/u1wYUiH/orz wbIC2S4dBsPAPihL3ztOU1yE86GPyQtSE0kU+/7snnLt4QGi6PChf3t5gnNjAzjUUovO8rgI c+5yN5heq5loYHgK6OQ9OlHzsPHO9e9MOQcKlFycs1pyijFGzDwdNUm/SchK8iWT2QApTx4A K9bCVaboTA2T77QYkRcRJYSsO1alGX0ome/hMLD1daXlkrNUp1HWa3K4iytLRXjCSIorWiGs n+q3krnpXu3TFkA8qtOFZMdnIiFuiq1yLT8hptsV5xh1TA2nsVvSYiaCr3q4s4BKjS/KrLDb qoxzw8ISjdUp4pA85vb6YLCmb39NgidD+7PmAr65lBNveIFynTgsja1rRQ4= In-Reply-To: <28202f96-f234-4c7c-be6b-3019e119bb0a@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/11/2026 10:32, Imran Shaik wrote: >>> + The TSC block is a timestamp generator that maintains a running counter used >>> + for system timekeeping, and is functional with just the AHB and counter >>> + clocks. >>> + The ETU block captures TSC timestamps for external hardware events. Each >>> + ETU slice binds a slice number to an external event selector, and >>> + generates its own interrupt when that event is triggered. >>> + >>> +properties: >>> + compatible: >>> + const: qcom,qdu1000-tscss >> >> I failed to spot the difference against your binding at patch #1. How do >> they differ? >> > > The ETU interrupt wiring between the QDU1000 and SA8775P/QCS8300 is > different. > The SA8775P/QCS8300 share one summary interrupt across all ETU slices, > and the QDU1000 has each slice with its own interrupt line. Due to this, > kept them as separate bindings. > > Can add them into one file with an if/then on compatible if you'd > prefer. Please let me know. I see, it's fine to keep them separate, but you need common schema to define common vendor properties. Best regards, Krzysztof