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Thu, 28 May 2026 01:00:10 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , Subject: [PATCH v2 09/11] PCI/ATS: Add PRI stubs Date: Thu, 28 May 2026 00:59:37 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000208:EE_|DS4PR12MB9820:EE_ X-MS-Office365-Filtering-Correlation-Id: 267a8c47-7925-4161-2583-08debc8f3541 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|36860700016|376014|82310400026|1800799024|56012099006|11063799006|6133799003|22082099003|18002099003|13003099007; X-Microsoft-Antispam-Message-Info: 4jTEMV9bgt/QThHPtmOs9brjqOIHL5isznyZffqT0xqEJucee+aOjx4W2bAKhbbskyt/YMTOmFPNncAxJSn91mt8Wd7hFvAtNfvx41nDmriBBpRCaFYrjBcAOavhV+Y8l7nl9Qimh5XPNF0ogRSr/e2hx/YypsCCMoy7m5QxV3K0CHDLluCGZML2usrrjueQNf++/0jR4NDSuSWDMflvEzExWbRL5MUTyQZsZpvop2ykvi9qHtSlSBSsmYHkuuICrjYGqR9G0YZM1KT1CRJgxe42OWAMHSR8N3imASgamBWBFyEGmViEyNsV9NpoliTLCjO0YCLxf0G6qEaAsUwA3LVxphKN2hsJ698rqHqnzHhkbkp+7LvuRMwLq+GcUqFra6Sa3fW0zTaLrsShIl21LafUyy49Zx2VH2HBdGLzmn0NBmWTfGr1/flK2mWI0RRrYg9ulVh3DERaPgN2CoxbQueZNp63/P6Bof0/X/TvCX69/mphSE9u5U7l1fKwKp6t92MqUWFOitHCTWr4KH/razYKrzBQsE4XGzeHXa6oHWtf75lR8OOnvDRem7lLXoHXhbbFpABJL8hTqm0CTx9QZXjsbnPRkZL1rottdc9UGK3XgHxXiRqqhMJdMyYWrYnJkGHpVZlWKlTAzfWz+4pMTiRCXp2DAO534zyO3bVuePbOSKqwm8ZO4yfiP07Y8RDlspTACGK8748WIY4ZEv42rNqFF0Pro7LClZ2jRIVnvV4= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(36860700016)(376014)(82310400026)(1800799024)(56012099006)(11063799006)(6133799003)(22082099003)(18002099003)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RQ2kBt9N+uC/u0KILBGaphLHeqpUlCypxIhkoEnHLf5TF/o6hbPugLtXOzeGn5kfziS7gyou/6HG9VdTXYcPIcTFTy6D9etYq9y5x2lM9efENk2T18LGEKIeKQQats/slNUprN3M8R0m5jXdDZLITJCM5M88Cw3U6O5JVrpcwMDeRS1/InbWqX6rqgDTE7kK03HEyYLAXcnPqEpkVMAU8RR5iIxIGo1BkrVdc7jOu+ZhT77quDpIrtrqTX2PYTTgpqJunLJL/LaSZXcOX2xqVGOt3EYPcIM8DGFh2nkiAUL6fEapoXLR1HAt5nm8ckB2v3jHlDgp3gYU09dAhJLKwj41X7mlpC+yOPOaxNxDk4kc+lPdR8Ro6dF5q5tmcVL6Ex0SczvOTJKRm15qLHVlNZdB9hCREkIUFTJhpfBvSFGo4+dF4B3sbFQUjZFDE7Hv X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2026 08:00:39.2609 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 267a8c47-7925-4161-2583-08debc8f3541 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000208.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9820 From: Jean-Philippe Brucker The SMMUv3 driver, which can be built without CONFIG_PCI, will soon gain support for PRI. Partially revert commit c6e9aefbf9db ("PCI/ATS: Remove unused PRI and PASID stubs") to re-introduce the PRI stubs, and avoid adding more #ifdefs to the SMMU driver. Link: https://lore.kernel.org/iommu/20201112125519.3987595-8-jean-philippe@linaro.org/ Acked-by: Bjorn Helgaas Reviewed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Jean-Philippe Brucker [nicolinc: drop stale APIs] Signed-off-by: Nicolin Chen --- include/linux/pci-ats.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h index 75c6c86cf09dc..a1b249fb38bb4 100644 --- a/include/linux/pci-ats.h +++ b/include/linux/pci-ats.h @@ -33,6 +33,11 @@ int pci_reset_pri(struct pci_dev *pdev); int pci_prg_resp_pasid_required(struct pci_dev *pdev); bool pci_pri_supported(struct pci_dev *pdev); #else +static inline int pci_enable_pri(struct pci_dev *pdev, u32 reqs) +{ return -ENODEV; } +static inline void pci_disable_pri(struct pci_dev *pdev) { } +static inline int pci_reset_pri(struct pci_dev *pdev) +{ return -ENODEV; } static inline bool pci_pri_supported(struct pci_dev *pdev) { return false; } #endif /* CONFIG_PCI_PRI */ -- 2.43.0