mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Dean Luick <dean.luick@cornelisnetworks.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	linux-pci@vger.kernel.org, "Bjorn Helgaas" <helgaas@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Lukas Wunner" <lukas@wunner.de>,
	"Alexandru Gagniuc" <mr.nuke.me@gmail.com>,
	"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
	"Srinivas Pandruvada" <srinivas.pandruvada@linux.intel.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	linux-pm@vger.kernel.org,
	"Dennis Dalessandro" <dennis.dalessandro@cornelisnetworks.com>,
	"Jason Gunthorpe" <jgg@ziepe.ca>,
	"Leon Romanovsky" <leon@kernel.org>,
	linux-rdma@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Alex Deucher <alexdeucher@gmail.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Amit Kucheria <amitk@kernel.org>, Zhang Rui <rui.zhang@intel.com>
Subject: Re: [PATCH v2 04/10] drm/IB/hfi1: Use RMW accessors for changing LNKCTL2
Date: Fri, 15 Sep 2023 08:51:01 -0500	[thread overview]
Message-ID: <c0e07dbf-e19e-43b7-9c95-8025a12323b8@cornelisnetworks.com> (raw)
In-Reply-To: <20230915120142.32987-5-ilpo.jarvinen@linux.intel.com>

On 9/15/2023 7:01 AM, Ilpo Järvinen wrote:
> Don't assume that only the driver would be accessing LNKCTL2. In the
> case of upstream (parent), the driver does not even own the device it's
> changing the registers for.
>
> Use RMW capability accessors which do proper locking to avoid losing
> concurrent updates to the register value. This change is also useful as
> a cleanup.
>
> Suggested-by: Lukas Wunner <lukas@wunner.de>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

I believe the subject should begin with "RDMA/hfi1:", the current expectation for all devices in drivers/infiniband.

> ---
>  drivers/infiniband/hw/hfi1/pcie.c | 30 ++++++++----------------------
>  1 file changed, 8 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
> index 08732e1ac966..60a177f52eb5 100644
> --- a/drivers/infiniband/hw/hfi1/pcie.c
> +++ b/drivers/infiniband/hw/hfi1/pcie.c
> @@ -1212,14 +1212,11 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
>                   (u32)lnkctl2);
>       /* only write to parent if target is not as high as ours */
>       if ((lnkctl2 & PCI_EXP_LNKCTL2_TLS) < target_vector) {
> -             lnkctl2 &= ~PCI_EXP_LNKCTL2_TLS;
> -             lnkctl2 |= target_vector;
> -             dd_dev_info(dd, "%s: ..new link control2: 0x%x\n", __func__,
> -                         (u32)lnkctl2);
> -             ret = pcie_capability_write_word(parent,
> -                                              PCI_EXP_LNKCTL2, lnkctl2);
> +             ret = pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL2,
> +                                                      PCI_EXP_LNKCTL2_TLS,
> +                                                      target_vector);
>               if (ret) {
> -                     dd_dev_err(dd, "Unable to write to PCI config\n");
> +                     dd_dev_err(dd, "Unable to change PCI target speed\n");

To differentiate from the dev_err below, add "parent", i.e. "Unable to change parent PCI target speed".


>                       return_error = 1;
>                       goto done;
>               }
> @@ -1228,22 +1225,11 @@ int do_pcie_gen3_transition(struct hfi1_devdata *dd)
>       }
>
>       dd_dev_info(dd, "%s: setting target link speed\n", __func__);
> -     ret = pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKCTL2, &lnkctl2);
> +     ret = pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL2,
> +                                              PCI_EXP_LNKCTL2_TLS,
> +                                              target_vector);
>       if (ret) {
> -             dd_dev_err(dd, "Unable to read from PCI config\n");
> -             return_error = 1;
> -             goto done;
> -     }
> -
> -     dd_dev_info(dd, "%s: ..old link control2: 0x%x\n", __func__,
> -                 (u32)lnkctl2);
> -     lnkctl2 &= ~PCI_EXP_LNKCTL2_TLS;
> -     lnkctl2 |= target_vector;
> -     dd_dev_info(dd, "%s: ..new link control2: 0x%x\n", __func__,
> -                 (u32)lnkctl2);
> -     ret = pcie_capability_write_word(dd->pcidev, PCI_EXP_LNKCTL2, lnkctl2);
> -     if (ret) {
> -             dd_dev_err(dd, "Unable to write to PCI config\n");
> +             dd_dev_err(dd, "Unable to change PCI target speed\n");

To differentiate from the dev_err above, add "device", i.e. "Unable to change device PCI target speed".



>               return_error = 1;
>               goto done;
>       }

External recipient

  reply	other threads:[~2023-09-15 13:51 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-15 12:01 [PATCH v2 00/10] Add PCIe Bandwidth Controller Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 01/10] PCI: Protect Link Control 2 Register with RMW locking Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 02/10] drm/radeon: Use RMW accessors for changing LNKCTL2 Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 03/10] drm/amdgpu: " Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 04/10] drm/IB/hfi1: " Ilpo Järvinen
2023-09-15 13:51   ` Dean Luick [this message]
2023-09-15 14:02     ` Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 05/10] PCI: Store all PCIe Supported Link Speeds Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 06/10] PCI: Cache PCIe device's Supported Speed Vector Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 07/10] PCI/LINK: Re-add BW notification portdrv as PCIe BW controller Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 08/10] PCI/bwctrl: Add "controller" part into PCIe bwctrl Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 09/10] thermal: Add PCIe cooling driver Ilpo Järvinen
2023-09-15 12:01 ` [PATCH v2 10/10] selftests/pcie_bwctrl: Create selftests Ilpo Järvinen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c0e07dbf-e19e-43b7-9c95-8025a12323b8@cornelisnetworks.com \
    --to=dean.luick@cornelisnetworks.com \
    --cc=alexdeucher@gmail.com \
    --cc=amitk@kernel.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=dennis.dalessandro@cornelisnetworks.com \
    --cc=helgaas@kernel.org \
    --cc=ilpo.jarvinen@linux.intel.com \
    --cc=jgg@ziepe.ca \
    --cc=kw@linux.com \
    --cc=leon@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=linux-rdma@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=lukas@wunner.de \
    --cc=mr.nuke.me@gmail.com \
    --cc=quic_krichai@quicinc.com \
    --cc=rafael@kernel.org \
    --cc=robh@kernel.org \
    --cc=rui.zhang@intel.com \
    --cc=srinivas.pandruvada@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®