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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-acaa1ce81c5sm880990966b.184.2025.04.14.04.13.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 14 Apr 2025 04:13:32 -0700 (PDT) Message-ID: Date: Mon, 14 Apr 2025 13:13:28 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/10] arm64: dts: qcom: sar2130p: add display nodes To: Dmitry Baryshkov , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kuogee Hsieh , Krishna Manikandan , Jonathan Marek , Bjorn Andersson , Neil Armstrong , Will Deacon , Robin Murphy , Joerg Roedel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov References: <20250314-sar2130p-display-v2-0-31fa4502a850@oss.qualcomm.com> <20250314-sar2130p-display-v2-10-31fa4502a850@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250314-sar2130p-display-v2-10-31fa4502a850@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: xBqjmI7iBN0pSx_U07wAm55PC0-oggf- X-Proofpoint-ORIG-GUID: xBqjmI7iBN0pSx_U07wAm55PC0-oggf- X-Authority-Analysis: v=2.4 cv=Cve/cm4D c=1 sm=1 tr=0 ts=67fcedde cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=KKAkSRfTAAAA:8 a=M9PBs-WKjKzZjRsr6pgA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-14_03,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 bulkscore=0 spamscore=0 phishscore=0 suspectscore=0 impostorscore=0 mlxlogscore=689 mlxscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504140081 On 3/14/25 7:09 AM, Dmitry Baryshkov wrote: > From: Dmitry Baryshkov > > Add display controller, two DSI hosts, two DSI PHYs and a single DP > controller. Link DP to the QMP Combo PHY. > > Signed-off-by: Dmitry Baryshkov > --- [...] > + mdss_mdp: display-controller@ae01000 { > + compatible = "qcom,sar2130p-dpu"; > + reg = <0x0 0x0ae01000 0x0 0x8f000>, > + <0x0 0x0aeb0000 0x0 0x2008>; size = 0x3000 [...] > + > + mdss_dp0: displayport-controller@ae90000 { > + compatible = "qcom,sar2130p-dp", > + "qcom,sm8350-dp"; > + reg = <0x0 0xae90000 0x0 0x200>, > + <0x0 0xae90200 0x0 0x200>, > + <0x0 0xae90400 0x0 0xc00>, > + <0x0 0xae91000 0x0 0x400>, > + <0x0 0xae91400 0x0 0x400>; > + interrupt-parent = <&mdss>; > + interrupts = <12>; > + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, > + <&dispcc DISP_CC_MDSS_DPTX0_AUX_CLK>, > + <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK>, > + <&dispcc DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>, > + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK>; > + clock-names = "core_iface", > + "core_aux", > + "ctrl_link", > + "ctrl_link_iface", > + "stream_pixel"; > + > + assigned-clocks = <&dispcc DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>, > + <&dispcc DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>; > + assigned-clock-parents = <&usb_dp_qmpphy QMP_USB43DP_DP_LINK_CLK>, > + <&usb_dp_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; > + > + phys = <&usb_dp_qmpphy QMP_USB43DP_DP_PHY>; > + phy-names = "dp"; > + > + #sound-dai-cells = <0>; > + > + operating-points-v2 = <&dp_opp_table>; > + power-domains = <&rpmhpd RPMHPD_MMCX>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + mdss_dp0_in: endpoint { > + remote-endpoint = <&dpu_intf0_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + mdss_dp0_out: endpoint { > + remote-endpoint = <&usb_dp_qmpphy_dp_in>; > + }; > + }; > + }; > + > + dp_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-162000000 { > + opp-hz = /bits/ 64 <162000000>; > + required-opps = <&rpmhpd_opp_low_svs_d1>; > + }; > + > + opp-270000000 { > + opp-hz = /bits/ 64 <270000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + }; > + > + opp-540000000 { > + opp-hz = /bits/ 64 <540000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; Weirdly enough the 540 rate isn't in the clock plan for the pclk and so isn't 162 > + > + opp-810000000 { > + opp-hz = /bits/ 64 <810000000>; > + required-opps = <&rpmhpd_opp_nom>; > + }; > + }; > + }; [...] > + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, > + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; > + assigned-clock-parents = <&mdss_dsi0_phy 0>, > + <&mdss_dsi0_phy 1>; Krzysztof recently introduced defines for these Konrad