From: Paolo Abeni <pabeni@redhat.com>
To: Kyle Switch <kyle.switch@motor-comm.com>,
andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com,
kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, andrew@lunn.ch, hkallweit1@gmail.com,
linux@armlinux.org.uk, Frank.Sae@motor-comm.com,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: ming.xu@motor-comm.com, xiaolin.xu@motor-comm.com,
jianmin.wang@motor-comm.com
Subject: Re: [PATCH net-next v28 2/3] net: phy: Add support for Template Control register for PMA
Date: Tue, 10 Nov 2026 16:00:30 +0100 [thread overview]
Message-ID: <c14fb8f4-82b5-4aac-8c64-a2dadb210e9a@redhat.com> (raw)
In-Reply-To: <20261104060636.3901918-3-kyle.switch@motor-comm.com>
On 11/4/26 07:06, Kyle Switch wrote:
> diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
> index 06f4bc3c20c7..353ca13c64fc 100644
> --- a/include/uapi/linux/mdio.h
> +++ b/include/uapi/linux/mdio.h
> @@ -63,6 +63,7 @@
> /* Media-dependent registers. */
> #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
> #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
> +#define MDIO_PMA_10GBT_TESTMODE 132 /* Test mode control */
> #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
> * Lanes B-D are numbered 134-136. */
> #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
> @@ -320,6 +321,17 @@
> /* PMA 10GBASE-R Fast Retrain status and control register. */
> #define MDIO_PMA_10GBR_FSRT_ENABLE 0x0001 /* Fast retrain enable */
>
> +/* PMA 10GBASE-T Template Test Mode Register*/
> +#define MDIO_PMA_10GBT_TESTMODE_MASK GENMASK(15, 13) /* Template test mode */
IDK if this has possibly been discussed in previous revisions,
but uAPI should not use GENMASK(). The plain hex should be preferable.
/P> +#define MDIO_PMA_10GBT_TESTMODE_NORMAL 0x0 /* Template Normal */
> +#define MDIO_PMA_10GBT_TESTMODE_1 0x1 /* Template TestMode1 */
> +#define MDIO_PMA_10GBT_TESTMODE_2 0x2 /* Template TestMode2 */
> +#define MDIO_PMA_10GBT_TESTMODE_3 0x3 /* Template TestMode3 */
> +#define MDIO_PMA_10GBT_TESTMODE_4 0x4 /* Template TestMode4 */
> +#define MDIO_PMA_10GBT_TESTMODE_5 0x5 /* Template TestMode5 */
> +#define MDIO_PMA_10GBT_TESTMODE_6 0x6 /* Template TestMode6 */
> +#define MDIO_PMA_10GBT_TESTMODE_7 0x7 /* Template TestMode7 */
> +
> /* PCS 10GBASE-R/-T status register 1. */
> #define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001 /* Block lock attained */
>
next prev parent reply other threads:[~2026-11-10 15:00 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 6:06 [PATCH net-next v28 0/3] net: phy: Add driver for Motorcomm Quad 2.5GbE phy Kyle Switch
2026-11-04 6:06 ` [PATCH net-next v28 1/3] dt-bindings: net: Document Motorcomm YT8824 PHY package Kyle Switch
2026-11-04 6:06 ` [PATCH net-next v28 2/3] net: phy: Add support for Template Control register for PMA Kyle Switch
2026-11-10 15:00 ` Paolo Abeni [this message]
2026-11-04 6:06 ` [PATCH net-next v28 3/3] net: phy: Add driver for Motorcomm Quad 2.5GbE phy Kyle Switch
2026-11-10 14:55 ` Paolo Abeni
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