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Sat, 07 Jun 2025 04:41:48 -0700 (PDT) Message-ID: Date: Sat, 7 Jun 2025 14:41:47 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 6/9] ARM: dts: microchip: sama7d65: Add crypto support To: Ryan.Wanner@microchip.com, herbert@gondor.apana.org.au, davem@davemloft.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, olivia@selenic.com Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <5d045fc3be18fcd6644f14b9568f1f8d7c8d75a1.1747077616.git.Ryan.Wanner@microchip.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: <5d045fc3be18fcd6644f14b9568f1f8d7c8d75a1.1747077616.git.Ryan.Wanner@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12.05.2025 22:27, Ryan.Wanner@microchip.com wrote: > From: Ryan Wanner > > Add and enable SHA, AES, TDES, and TRNG for SAMA7D65 SoC. > > Signed-off-by: Ryan Wanner Reviewed-by: Claudiu Beznea > --- > arch/arm/boot/dts/microchip/sama7d65.dtsi | 39 +++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi > index d08d773b1cc5..90cbea576d91 100644 > --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi > +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi > @@ -186,6 +186,45 @@ sdmmc1: mmc@e1208000 { > status = "disabled"; > }; > > + aes: crypto@e1600000 { > + compatible = "microchip,sama7d65-aes", "atmel,at91sam9g46-aes"; > + reg = <0xe1600000 0x100>; > + interrupts = ; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>; > + clock-names = "aes_clk"; > + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, > + <&dma0 AT91_XDMAC_DT_PERID(2)>; > + dma-names = "tx", "rx"; > + }; > + > + sha: crypto@e1604000 { > + compatible = "microchip,sama7d65-sha", "atmel,at91sam9g46-sha"; > + reg = <0xe1604000 0x100>; > + interrupts = ; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 78>; > + clock-names = "sha_clk"; > + dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; > + dma-names = "tx"; > + }; > + > + tdes: crypto@e1608000 { > + compatible = "microchip,sama7d65-tdes", "atmel,at91sam9g46-tdes"; > + reg = <0xe1608000 0x100>; > + interrupts = ; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 91>; > + clock-names = "tdes_clk"; > + dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, > + <&dma0 AT91_XDMAC_DT_PERID(53)>; > + dma-names = "tx", "rx"; > + }; > + > + trng: rng@e160c000 { > + compatible = "microchip,sama7d65-trng", "microchip,sam9x60-trng"; > + reg = <0xe160c000 0x100>; > + interrupts = ; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 92>; > + }; > + > dma0: dma-controller@e1610000 { > compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma"; > reg = <0xe1610000 0x1000>;