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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.googlemail.com with ESMTPSA id g3sm2561967ejo.147.2022.01.10.07.10.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 Jan 2022 07:10:38 -0800 (PST) Message-ID: Date: Mon, 10 Jan 2022 16:10:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 From: Paolo Bonzini Subject: Re: [PATCH v2 3/5] KVM: SVM: fix race between interrupt delivery and AVIC inhibition To: Sean Christopherson Cc: Maxim Levitsky , kvm@vger.kernel.org, Jim Mattson , Thomas Gleixner , Joerg Roedel , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Vitaly Kuznetsov , Borislav Petkov , linux-kernel@vger.kernel.org, Dave Hansen , "H. Peter Anvin" , Wanpeng Li , Ingo Molnar References: <20211213104634.199141-1-mlevitsk@redhat.com> <20211213104634.199141-4-mlevitsk@redhat.com> <628ac6d9b16c6b3a2573f717df0d2417df7caddb.camel@redhat.com> <6a11edec-c29a-95df-393e-363e1af46257@redhat.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 1/8/22 00:42, Sean Christopherson wrote: > Yeah, I don't disagree, but the flip side is that without the early check, it's > not all that obvious that SVM must not return -1. But that's what the comment is about. > And when AVIC isn't supported > or is disabled at the module level, flowing into AVIC "specific" IRR logic is > a bit weird. And the LAPIC code effectively becomes Intel-only. Yeah, I agree that this particular aspect is a bit weird at first. But it is also natural if you consider how IRR is implemented for AVIC vs. APICv, especially with respect to incomplete IPIs. And the LAPIC code becomes a blueprint for AVIC's, i.e. you can see that the AVIC code effectively becomes the one in lapic.c when you have either !vcpu->arch.apicv_active or an incomplete IPI. I don't hate the code below, it does lose a bit of expressiveness of the LAPIC code but I guess it's a good middle ground. Paolo > To make everyone happy, and fix the tracepoint issue, what about moving delivery > into vendor code? E.g. the below (incomplete), with SVM functions renamed so that > anything that isn't guaranteed to be AVIC specific uses svm_ instead of avic_. > > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index baca9fa37a91..a9ac724c6305 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -1096,14 +1096,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, > apic->regs + APIC_TMR); > } > > - if (static_call(kvm_x86_deliver_posted_interrupt)(vcpu, vector)) { > - kvm_lapic_set_irr(vector, apic); > - kvm_make_request(KVM_REQ_EVENT, vcpu); > - kvm_vcpu_kick(vcpu); > - } else { > - trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, > - trig_mode, vector); > - } > + static_call(kvm_x86_deliver_interrupt)(vcpu, vector); > break; > > case APIC_DM_REMRD: > diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c > index fe06b02994e6..1fadd14ea884 100644 > --- a/arch/x86/kvm/vmx/vmx.c > +++ b/arch/x86/kvm/vmx/vmx.c > @@ -4012,6 +4012,18 @@ static int vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector) > return 0; > } > > +static void vmx_deliver_interrupt(struct kvm_vcpu *vcpu, int vector) > +{ > + if (vmx_deliver_posted_interrupt(vcpu, vector)) { > + kvm_lapic_set_irr(vector, apic); > + kvm_make_request(KVM_REQ_EVENT, vcpu); > + kvm_vcpu_kick(vcpu); > + } else { > + trace_kvm_apicv_accept_irq(vcpu->vcpu_id, delivery_mode, > + trig_mode, vector); > + } > +} > + > /* > * Set up the vmcs's constant host-state fields, i.e., host-state fields that > * will not change in the lifetime of the guest. > @@ -7651,7 +7663,7 @@ static struct kvm_x86_ops vmx_x86_ops __initdata = { > .hwapic_isr_update = vmx_hwapic_isr_update, > .guest_apic_has_interrupt = vmx_guest_apic_has_interrupt, > .sync_pir_to_irr = vmx_sync_pir_to_irr, > - .deliver_posted_interrupt = vmx_deliver_posted_interrupt, > + .deliver_interrupt = vmx_deliver_interrupt, > .dy_apicv_has_pending_interrupt = pi_has_pending_interrupt, > > .set_tss_addr = vmx_set_tss_addr, >