From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BAA1FC6FD18 for ; Wed, 19 Apr 2023 20:05:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231485AbjDSUFs (ORCPT ); Wed, 19 Apr 2023 16:05:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230404AbjDSUFn (ORCPT ); Wed, 19 Apr 2023 16:05:43 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D307D49D9; Wed, 19 Apr 2023 13:05:38 -0700 (PDT) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33JJvi6e029838; Wed, 19 Apr 2023 20:05:29 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=+RpcB5qKe9o7XxXSkazpxXba+GyKdraybL0xw2kxvgA=; b=PS3olbQ6fvHjCwz3pBdWaemiJDOzYyQgXYPY38osiIdwXfSAv0Sa6uAkWw9sNguAS+77 1M/nD9k4/KzAu5/vb9bnZQBbkaQA8WIjYYtiGlTPiFKgvP9N1UkRE65G0UmVyEcubFAL 9N3BHzq5wVl13TkAw6/BqrV+tRR9iIK2sjG5ZfKvToAQbuHPX22oLgCJqL7xlGGeFdgf WMgGuK3YGmd9MAydCcapgLQdJ3+vlprmBMKtoJcQjOMlzxkKRzvON+f2/eEGaWgtyo7H VtjZzmsVr8wgRLV3k1U4BWeK+iaSzOGxesjFsO0V2h2voYSt496GAj5IxbfapwW0dQ+Y MQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q2hd9h082-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 19 Apr 2023 20:05:29 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33JK5Ssu019006 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 19 Apr 2023 20:05:28 GMT Received: from [10.134.71.70] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 19 Apr 2023 13:05:27 -0700 Message-ID: Date: Wed, 19 Apr 2023 13:05:26 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [Freedreno] [PATCH 1/5] dt-bindings: display/msm: Add reg bus interconnect Content-Language: en-US To: Konrad Dybcio , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Krishna Manikandan CC: , , , , "Marijn Suijten" , References: <20230417-topic-dpu_regbus-v1-0-06fbdc1643c0@linaro.org> <20230417-topic-dpu_regbus-v1-1-06fbdc1643c0@linaro.org> From: Jeykumar Sankaran In-Reply-To: <20230417-topic-dpu_regbus-v1-1-06fbdc1643c0@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: k5dWlDyfAgv4xkDSZ19w7GWAsVtuHHjd X-Proofpoint-ORIG-GUID: k5dWlDyfAgv4xkDSZ19w7GWAsVtuHHjd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-19_13,2023-04-18_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 impostorscore=0 adultscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 phishscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304190174 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Resending the question as the previous one was sent only to the freedreno list. Apologies for spamming! On 4/17/2023 8:30 AM, Konrad Dybcio wrote: > Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there's > another path that needs to be handled to ensure MDSS functions properly, > namely the "reg bus", a.k.a the CPU-MDSS interconnect. > > Gating that path may have a variety of effects.. from none to otherwise > inexplicable DSI timeouts.. > > Describe it in bindings to allow for use in device trees. > > Signed-off-by: Konrad Dybcio > --- > Documentation/devicetree/bindings/display/msm/mdss-common.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > index ccd7d6417523..9eb5b6d3e0b9 100644 > --- a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > +++ b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml > @@ -72,6 +72,7 @@ properties: > items: > - const: mdp0-mem > - const: mdp1-mem > + - const: cpu-cfg > If posted already, please point to the DTSI patch for this ICC path. > resets: > items: >