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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b2749c38adsm240381685ad.69.2026.04.07.23.05.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Apr 2026 23:05:40 -0700 (PDT) Message-ID: Date: Wed, 8 Apr 2026 11:35:34 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/5] platform: arm64: Add driver for EC found on Qualcomm reference devices From: Anvesh Jain P To: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= Cc: Sibi Sankar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Hans de Goede , Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio , Randy Dunlap , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, Maya Matuszczyk , Dmitry Baryshkov , Konrad Dybcio References: <20260327-add-driver-for-ec-v7-0-7684c915e42c@oss.qualcomm.com> <20260327-add-driver-for-ec-v7-2-7684c915e42c@oss.qualcomm.com> <308ae40a-34f1-9b69-bfe7-150ca8ad1d29@linux.intel.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=De0nbPtW c=1 sm=1 tr=0 ts=69d5f035 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=pGLkceISAAAA:8 a=VwQbUJbxAAAA:8 a=-0q7uios7j49SWls-T0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDA4MDA1MyBTYWx0ZWRfX3H+BkAkxt/pG Oh4Ib3ao2OxYKkE8ppNt4kYDlLqfRAGxXG5FmuQfYtqtWL6y3hi0XMvz77aNhbpPVLeLs9doZ3m FDzy6/lTMGyVpwTDZDhHEca1+O44eKOQ6u8LEy8DzKP2kVBcw1rNqIepPMPiZA8+U6Oh9b3UDr5 dSUWGziLfs7GT8lsH3U0MYQpROrlXkwFZP+DxNEzhOu8RMLVvzY8dVTXhbFNV9CUxnteaBVETjy IWrkmya2Af1XlNY66cGu2V/arrlQYBiUqmf2AHUnB3LKQdZyuRQ1o4aYy9onxNFEF5uvEd8Lis+ olyIMKwUp0FxCDuIJrUMbYJacksAjYn3rzH07x+OLA1PMV5kpsNfZiecdU7HBK7WlHArNGIoYbc 9IXQwkxYiqRfaH/JmDNxjoVWXDt5hUxbK/GE1CCvQIOPaNsfXP2dC3Dmk4WDXB3cocfVxovIcEa GDUCve/tiwmpInUnS7A== X-Proofpoint-ORIG-GUID: 9rHieXN86op0j5dFZUiAwy_Jpw6xKdQ1 X-Proofpoint-GUID: 9rHieXN86op0j5dFZUiAwy_Jpw6xKdQ1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-08_02,2026-04-07_05,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1015 bulkscore=0 phishscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604080053 On 3/30/2026 12:14 PM, Anvesh Jain P wrote: > > > On 3/27/2026 5:20 PM, Ilpo Järvinen wrote: >> On Fri, 27 Mar 2026, Anvesh Jain P wrote: >> >>> From: Sibi Sankar >>> >>> Add Embedded controller driver support for Hamoa/Purwa/Glymur qualcomm >>> reference boards. It handles fan control, temperature sensors, access >>> to EC state changes and supports reporting suspend entry/exit to the >>> EC. >>> >>> Co-developed-by: Maya Matuszczyk >>> Signed-off-by: Maya Matuszczyk >>> Signed-off-by: Sibi Sankar >>> Reviewed-by: Dmitry Baryshkov >>> Acked-by: Konrad Dybcio >>> Co-developed-by: Anvesh Jain P >>> Signed-off-by: Anvesh Jain P >>> --- >>> MAINTAINERS | 8 + >>> drivers/platform/arm64/Kconfig | 12 + >>> drivers/platform/arm64/Makefile | 1 + >>> drivers/platform/arm64/qcom-hamoa-ec.c | 451 +++++++++++++++++++++++++++++++++ >>> 4 files changed, 472 insertions(+) >>> >>> diff --git a/MAINTAINERS b/MAINTAINERS >>> index 30ca84404976..536dfd9adff4 100644 >>> --- a/MAINTAINERS >>> +++ b/MAINTAINERS >>> @@ -21804,6 +21804,14 @@ F: Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml >>> F: drivers/misc/fastrpc.c >>> F: include/uapi/misc/fastrpc.h >>> >>> +QUALCOMM HAMOA EMBEDDED CONTROLLER DRIVER >>> +M: Anvesh Jain P >>> +M: Sibi Sankar >>> +L: linux-arm-msm@vger.kernel.org >>> +S: Maintained >>> +F: Documentation/devicetree/bindings/embedded-controller/qcom,hamoa-ec.yaml >>> +F: drivers/platform/arm64/qcom-hamoa-ec.c >>> + >>> QUALCOMM HEXAGON ARCHITECTURE >>> M: Brian Cain >>> L: linux-hexagon@vger.kernel.org >>> diff --git a/drivers/platform/arm64/Kconfig b/drivers/platform/arm64/Kconfig >>> index 10f905d7d6bf..025cdf091f9e 100644 >>> --- a/drivers/platform/arm64/Kconfig >>> +++ b/drivers/platform/arm64/Kconfig >>> @@ -90,4 +90,16 @@ config EC_LENOVO_THINKPAD_T14S >>> >>> Say M or Y here to include this support. >>> >>> +config EC_QCOM_HAMOA >>> + tristate "Embedded Controller driver for Qualcomm Hamoa/Glymur reference devices" >>> + depends on ARCH_QCOM || COMPILE_TEST >>> + depends on I2C >>> + help >>> + Say M or Y here to enable the Embedded Controller driver for Qualcomm >>> + Snapdragon-based Hamoa/Glymur reference devices. The driver handles fan >>> + control, temperature sensors, access to EC state changes and supports >>> + reporting suspend entry/exit to the EC. >>> + >>> + This driver currently supports Hamoa/Purwa/Glymur reference devices. >>> + >>> endif # ARM64_PLATFORM_DEVICES >>> diff --git a/drivers/platform/arm64/Makefile b/drivers/platform/arm64/Makefile >>> index 60c131cff6a1..7681be4a46e9 100644 >>> --- a/drivers/platform/arm64/Makefile >>> +++ b/drivers/platform/arm64/Makefile >>> @@ -9,3 +9,4 @@ obj-$(CONFIG_EC_ACER_ASPIRE1) += acer-aspire1-ec.o >>> obj-$(CONFIG_EC_HUAWEI_GAOKUN) += huawei-gaokun-ec.o >>> obj-$(CONFIG_EC_LENOVO_YOGA_C630) += lenovo-yoga-c630.o >>> obj-$(CONFIG_EC_LENOVO_THINKPAD_T14S) += lenovo-thinkpad-t14s.o >>> +obj-$(CONFIG_EC_QCOM_HAMOA) += qcom-hamoa-ec.o >>> diff --git a/drivers/platform/arm64/qcom-hamoa-ec.c b/drivers/platform/arm64/qcom-hamoa-ec.c >>> new file mode 100644 >>> index 000000000000..0f883130ac9a >>> --- /dev/null >>> +++ b/drivers/platform/arm64/qcom-hamoa-ec.c >>> @@ -0,0 +1,451 @@ >>> +// SPDX-License-Identifier: GPL-2.0-only >>> +/* >>> + * Copyright (c) 2024 Maya Matuszczyk >>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >>> + */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#define EC_SCI_EVT_READ_CMD 0x05 >>> +#define EC_FW_VERSION_CMD 0x0e >>> +#define EC_MODERN_STANDBY_CMD 0x23 >>> +#define EC_FAN_DBG_CONTROL_CMD 0x30 >>> +#define EC_SCI_EVT_CONTROL_CMD 0x35 >>> +#define EC_THERMAL_CAP_CMD 0x42 >>> + >>> +#define EC_FW_VERSION_RESP_LEN 4 >>> +#define EC_THERMAL_CAP_RESP_LEN 3 >>> +#define EC_FAN_DEBUG_CMD_LEN 6 >>> +#define EC_FAN_SPEED_DATA_SIZE 4 >>> + >>> +#define EC_MODERN_STANDBY_ENTER 0x01 >>> +#define EC_MODERN_STANDBY_EXIT 0x00 >>> + >>> +#define EC_FAN_DEBUG_MODE_OFF 0 >>> +#define EC_FAN_DEBUG_MODE_ON BIT(0) >> >> Add include for BIT(). >> > > Added in v6 to address this. > >>> +#define EC_FAN_ON BIT(1) >>> +#define EC_FAN_DEBUG_TYPE_PWM BIT(2) >>> +#define EC_MAX_FAN_CNT 2 >>> +#define EC_FAN_NAME_SIZE 20 >>> +#define EC_FAN_MAX_PWM 255 >>> + >>> +enum qcom_ec_sci_events { >>> + EC_FAN1_STATUS_CHANGE_EVT = 0x30, >>> + EC_FAN2_STATUS_CHANGE_EVT, >>> + EC_FAN1_SPEED_CHANGE_EVT, >>> + EC_FAN2_SPEED_CHANGE_EVT, >>> + EC_NEW_LUT_SET_EVT, >>> + EC_FAN_PROFILE_SWITCH_EVT, >>> + EC_THERMISTOR_1_THRESHOLD_CROSS_EVT, >>> + EC_THERMISTOR_2_THRESHOLD_CROSS_EVT, >>> + EC_THERMISTOR_3_THRESHOLD_CROSS_EVT, >>> + /* Reserved: 0x39 - 0x3c/0x3f */ >>> + EC_RECOVERED_FROM_RESET_EVT = 0x3d, >>> +}; >>> + >>> +struct qcom_ec_version { >>> + u8 main_version; >>> + u8 sub_version; >>> + u8 test_version; >>> +}; >>> + >>> +struct qcom_ec_thermal_cap { >>> +#define EC_THERMAL_FAN_CNT(x) (FIELD_GET(GENMASK(1, 0), (x))) >>> +#define EC_THERMAL_FAN_TYPE(x) (FIELD_GET(GENMASK(4, 2), (x))) >>> +#define EC_THERMAL_THERMISTOR_MASK(x) (FIELD_GET(GENMASK(7, 0), (x))) >>> + u8 fan_cnt; >>> + u8 fan_type; >>> + u8 thermistor_mask; >>> +}; >>> + >>> +struct qcom_ec_cooling_dev { >>> + struct thermal_cooling_device *cdev; >>> + struct device *parent_dev; >>> + u8 fan_id; >>> + u8 state; >>> +}; >>> + >>> +struct qcom_ec { >>> + struct qcom_ec_cooling_dev *ec_cdev; >>> + struct qcom_ec_thermal_cap thermal_cap; >>> + struct qcom_ec_version version; >>> + struct i2c_client *client; >>> +}; >>> + >>> +static int qcom_ec_read(struct qcom_ec *ec, u8 cmd, u8 resp_len, u8 *resp) >>> +{ >>> + int ret; >>> + >>> + ret = i2c_smbus_read_i2c_block_data(ec->client, cmd, resp_len, resp); >>> + >>> + if (ret < 0) >>> + return ret; >>> + else if (ret == 0 || ret == 0xff) >>> + return -EOPNOTSUPP; >>> + >>> + if (resp[0] >= resp_len) >>> + return -EINVAL; >>> + >>> + return 0; >>> +} >>> + >>> +/* >>> + * EC Device Firmware Version: >>> + * >>> + * Read Response: >>> + * ---------------------------------------------------------------------- >>> + * | Offset | Name | Description | >>> + * ---------------------------------------------------------------------- >>> + * | 0x00 | Byte count | Number of bytes in response | >>> + * | | | (excluding byte count) | >>> + * ---------------------------------------------------------------------- >>> + * | 0x01 | Test-version | Test-version of EC firmware | >>> + * ---------------------------------------------------------------------- >>> + * | 0x02 | Sub-version | Sub-version of EC firmware | >>> + * ---------------------------------------------------------------------- >>> + * | 0x03 | Main-version | Main-version of EC firmware | >>> + * ---------------------------------------------------------------------- >>> + * >>> + */ >>> +static int qcom_ec_read_fw_version(struct device *dev) >>> +{ >>> + struct i2c_client *client = to_i2c_client(dev); >>> + struct qcom_ec *ec = i2c_get_clientdata(client); >>> + struct qcom_ec_version *version = &ec->version; >>> + u8 resp[EC_FW_VERSION_RESP_LEN]; >>> + int ret; >>> + >>> + ret = qcom_ec_read(ec, EC_FW_VERSION_CMD, EC_FW_VERSION_RESP_LEN, resp); >>> + if (ret < 0) >>> + return ret; >>> + >>> + version->main_version = resp[3]; >>> + version->sub_version = resp[2]; >>> + version->test_version = resp[1]; >>> + >>> + dev_dbg(dev, "EC Version %d.%d.%d\n", >>> + version->main_version, version->sub_version, version->test_version); >>> + >>> + return 0; >>> +} >>> + >>> +/* >>> + * EC Device Thermal Capabilities: >>> + * >>> + * Read Response: >>> + * ------------------------------------------------------------------------------ >>> + * | Offset | Name | Description | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x00 | Byte count | Number of bytes in response | >>> + * | | | (excluding byte count) | >>> + * ------------------------------------------------------------------------------ >>> + * | 0x02 (LSB) | EC Thermal | Bit 0-1: Number of fans | >>> + * | 0x3 | Capabilities | Bit 2-4: Type of fan | >> >> 0x03 ? >> > > Typo, Will fix to 0x03 in next respin. > >>> + * | | | Bit 5-6: Reserved | >>> + * | | | Bit 7: Data Valid/Invalid | >>> + * | | | (Valid - 1, Invalid - 0) | >>> + * | | | Bit 8-15: Thermistor 0 - 7 presence | >>> + * | | | (1 present, 0 absent) | >>> + * ------------------------------------------------------------------------------ >>> + * >>> + */ >>> +static int qcom_ec_thermal_capabilities(struct device *dev) >>> +{ >>> + struct i2c_client *client = to_i2c_client(dev); >>> + struct qcom_ec *ec = i2c_get_clientdata(client); >>> + struct qcom_ec_thermal_cap *cap = &ec->thermal_cap; >>> + u8 resp[EC_THERMAL_CAP_RESP_LEN]; >>> + int ret; >>> + >>> + ret = qcom_ec_read(ec, EC_THERMAL_CAP_CMD, EC_THERMAL_CAP_RESP_LEN, resp); >>> + if (ret < 0) >>> + return ret; >>> + >>> + cap->fan_cnt = min(EC_MAX_FAN_CNT, EC_THERMAL_FAN_CNT(resp[1])); >>> + cap->fan_type = EC_THERMAL_FAN_TYPE(resp[1]); >>> + cap->thermistor_mask = EC_THERMAL_THERMISTOR_MASK(resp[2]); >>> + >>> + dev_dbg(dev, "Fan count: %d Fan Type: %d Thermistor Mask: %x\n", >> >> Please add include for dev_dbg(). >> >> It seems you've missed at least some of my comments to v5, please recheck >> those comments. I won't look further for now. >> >> -- >> i. >> > > Added for dev_dbg() in v6, will include > as well in in v8. That said, all your v5 comments > have been addressed, here is a summary of what was fixed: > > - Add for BIT() > - Add for IS_ERR() > - Switch thermistor mask format specifier from %d to %x > - Add missing braces > - Remove empty line within variable declarations > - Change loop counter i to unsigned int > - Replace snprintf() with scnprintf() > - Use sizeof(name) instead of the EC_FAN_NAME_SIZE macro directly > - Condense devm_thermal_of_cooling_device_register() to 2 lines > > Apologies if it appeared otherwise. If anything was missed, please do > point it out and I will address it in the next respin. > Hi Ilpo, Could you please take a look at this when you get a chance? -- Best Regards, Anvesh