From: Krzysztof Kozlowski <krzk@kernel.org>
To: Alireza Sanaee <alireza.sanaee@huawei.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org,
jonathan.cameron@huawei.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
mark.rutland@arm.com, shameerali.kolothum.thodi@huawei.com
Subject: Re: [PATCH v2 6/6] of: of_cpu_phandle_to_id to support SMT threads
Date: Sun, 4 May 2025 19:52:34 +0200 [thread overview]
Message-ID: <c2ace0e9-6565-44c3-84eb-555707f84509@kernel.org> (raw)
In-Reply-To: <20250504-acoustic-skink-of-greatness-1e90ac@kuoka>
On 04/05/2025 19:51, Krzysztof Kozlowski wrote:
>> In the CPU map, there are two cases that only one occurs at at time.
>> 1) "cpu" = <phandle>
>> 2) "cpus" = <phandle> <index>
>>
>> The first case addresses non-SMTs and the second case addresses SMTs
>> that the variable must be cpu(s) with an index where we later look up
>> the reg array with that.
>>
>> core0 {
>> thread0 {
>> cpus = <&cpu0 0>;
>
> Not so sure, dtschema says only one item is allowed in the phandle and I
> do not see here binding change.
>
> Although this wasn't even sent to me, so I'll just ignore your patchset.
Ah, there was no binding in the patchset, so that's why I did not get
it. Makes sense now, but question about missing binding change stays.
Best regards,
Krzysztof
next prev parent reply other threads:[~2025-05-04 17:52 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-02 16:12 [PATCH v2 0/6] DT: Enable sharing resources for " Alireza Sanaee
2025-05-02 16:12 ` [PATCH v2 1/6] of: add infra for finding CPU id from phandle Alireza Sanaee
2025-05-04 17:48 ` Krzysztof Kozlowski
2025-05-06 10:26 ` Alireza Sanaee
2025-05-02 16:12 ` [PATCH v2 2/6] arch_topology: update CPU map to use the new API Alireza Sanaee
2025-05-02 16:12 ` [PATCH v2 3/6] coresight: cti: Use of_cpu_phandle_to_id for grabbing CPU id Alireza Sanaee
2025-05-02 16:12 ` [PATCH v2 4/6] coresight: " Alireza Sanaee
2025-05-02 16:12 ` [PATCH v2 5/6] arm64: of: handle multiple threads in ARM cpu node Alireza Sanaee
2025-05-02 16:13 ` [PATCH v2 6/6] of: of_cpu_phandle_to_id to support SMT threads Alireza Sanaee
2025-05-04 17:51 ` Krzysztof Kozlowski
2025-05-04 17:52 ` Krzysztof Kozlowski [this message]
2025-05-06 10:23 ` Alireza Sanaee
2025-05-06 10:56 ` Krzysztof Kozlowski
2025-05-06 13:31 ` Alireza Sanaee
2025-05-06 13:36 ` Krzysztof Kozlowski
2025-05-06 13:52 ` Alireza Sanaee
2025-05-06 10:25 ` Alireza Sanaee
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