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[91.159.24.186]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5aa7b8fdc6bsm211520e87.29.2026.06.02.15.13.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 02 Jun 2026 15:13:01 -0700 (PDT) Message-ID: Date: Wed, 3 Jun 2026 01:13:00 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v13 1/5] media: dt-bindings: Add CAMSS device for Kaanapali To: Hangxiang Ma , Bryan O'Donoghue , Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jeyaprakash.soundrapandian@oss.qualcomm.com, Vijay Kumar Tumati , Krzysztof Kozlowski References: <20260508-kaanapali-camss-v13-0-2541d8e55651@oss.qualcomm.com> <20260508-kaanapali-camss-v13-1-2541d8e55651@oss.qualcomm.com> From: Vladimir Zapolskiy In-Reply-To: <20260508-kaanapali-camss-v13-1-2541d8e55651@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 5/8/26 11:05, Hangxiang Ma wrote: > Add bindings for Camera Subsystem (CAMSS) on the Qualcomm Kaanapali > platform. > > The Kaanapali platform provides: > - 6 x CSIPHY (CSI Physical Layer) > - 3 x TPG (Test Pattern Generator) > - 3 x CSID (CSI Decoder) > - 2 x CSID Lite > - 3 x VFE (Video Front End), 5 RDI per VFE > - 2 x VFE Lite, 4 RDI per VFE Lite > > Reviewed-by: Bryan O'Donoghue > Reviewed-by: Krzysztof Kozlowski > Signed-off-by: Hangxiang Ma > --- > .../bindings/media/qcom,kaanapali-camss.yaml | 433 +++++++++++++++++++++ > 1 file changed, 433 insertions(+) > > diff --git a/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml > new file mode 100644 > index 000000000000..2f2bb682f32f > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,kaanapali-camss.yaml > @@ -0,0 +1,433 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/qcom,kaanapali-camss.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Kaanapali Camera Subsystem (CAMSS) > + > +maintainers: > + - Hangxiang Ma > + > +description: > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. > + > +properties: > + compatible: > + const: qcom,kaanapali-camss > + > + reg: > + maxItems: 19 > + > + reg-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite0 > + - const: csid_lite1 > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: csiphy4 > + - const: csiphy5 > + - const: csitpg0 > + - const: csitpg1 > + - const: csitpg2 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite0 > + - const: vfe_lite1 > + > + clocks: > + maxItems: 35 > + > + clock-names: > + items: > + - const: camnoc_nrt_axi > + - const: camnoc_rt_axi > + - const: cpas_ahb > + - const: cpas_fast_ahb > + - const: cpas_vfe0 > + - const: cpas_vfe1 > + - const: cpas_vfe2 > + - const: cpas_vfe_lite > + - const: csid > + - const: csid_csiphy_rx > + - const: csiphy0 > + - const: csiphy0_timer > + - const: csiphy1 > + - const: csiphy1_timer > + - const: csiphy2 > + - const: csiphy2_timer > + - const: csiphy3 > + - const: csiphy3_timer > + - const: csiphy4 > + - const: csiphy4_timer > + - const: csiphy5 > + - const: csiphy5_timer > + - const: gcc_axi_hf > + - const: gcc_axi_sf > + - const: vfe0 > + - const: vfe0_fast_ahb > + - const: vfe1 > + - const: vfe1_fast_ahb > + - const: vfe2 > + - const: vfe2_fast_ahb > + - const: vfe_lite > + - const: vfe_lite_ahb > + - const: vfe_lite_cphy_rx > + - const: vfe_lite_csid > + - const: qdss_debug_xo > + > + interrupts: > + maxItems: 16 > + > + interrupt-names: > + items: > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid_lite0 > + - const: csid_lite1 > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csiphy3 > + - const: csiphy4 > + - const: csiphy5 > + - const: vfe0 > + - const: vfe1 > + - const: vfe2 > + - const: vfe_lite0 > + - const: vfe_lite1 > + > + interconnects: > + maxItems: 4 > + > + interconnect-names: > + items: > + - const: ahb > + - const: hf_mnoc > + - const: sf_mnoc > + - const: sf_icp_mnoc > + > + iommus: > + maxItems: 1 > + > + power-domains: > + items: > + - description: > + IFE0 GDSC - Global Distributed Switch Controller for IFE0. > + - description: > + IFE1 GDSC - Global Distributed Switch Controller for IFE1. > + - description: > + IFE2 GDSC - Global Distributed Switch Controller for IFE2. > + - description: > + Titan GDSC - Global Distributed Switch Controller for the entire camss. > + > + power-domain-names: > + items: > + - const: ife0 > + - const: ife1 > + - const: ife2 > + - const: top > + > + vdd-csiphy0-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY0 core block. Please double check the expected voltage on the rail, here 0.8V is outstanding in comparison to 0.9V found in other CAMSS dt bindings. > + > + vdd-csiphy0-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY0 pll block. > + > + vdd-csiphy1-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY1 core block. > + > + vdd-csiphy1-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY1 pll block. > + > + vdd-csiphy2-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY2 core block. > + > + vdd-csiphy2-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY2 pll block. > + > + vdd-csiphy3-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY3 core block. > + > + vdd-csiphy3-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY3 pll block. > + > + vdd-csiphy4-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY4 core block. > + > + vdd-csiphy4-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY4 pll block. > + > + vdd-csiphy5-0p8-supply: > + description: > + Phandle to a 0.8V regulator supply to CSIPHY5 core block. > + > + vdd-csiphy5-1p2-supply: > + description: > + Phandle to a 1.2V regulator supply to CSIPHY5 pll block. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + > + description: > + CSI input ports. > + > + patternProperties: > + "^port@[0-5]$": > + $ref: /schemas/graph.yaml#/$defs/port-base > + unevaluatedProperties: false > + description: > + Input ports for receiving CSI data on CSIPHY 0-5. > + > + properties: > + endpoint: > + $ref: video-interfaces.yaml# > + unevaluatedProperties: false > + > + properties: > + data-lanes: > + minItems: 1 > + maxItems: 4 > + > + bus-type: > + enum: > + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY > + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY > + > + required: > + - data-lanes > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - interrupts > + - interrupt-names > + - interconnects > + - interconnect-names > + - iommus > + - power-domains > + - power-domain-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + #include > + #include > + #include > + #include > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + isp@9253000 { > + compatible = "qcom,kaanapali-camss"; > + > + reg = <0x0 0x09253000 0x0 0x5e80>, > + <0x0 0x09263000 0x0 0x5e80>, > + <0x0 0x09273000 0x0 0x5e80>, > + <0x0 0x092d3000 0x0 0x3880>, > + <0x0 0x092e7000 0x0 0x3880>, > + <0x0 0x09523000 0x0 0x2000>, > + <0x0 0x09525000 0x0 0x2000>, > + <0x0 0x09527000 0x0 0x2000>, > + <0x0 0x09529000 0x0 0x2000>, > + <0x0 0x0952b000 0x0 0x2000>, > + <0x0 0x0952d000 0x0 0x2000>, > + <0x0 0x093fd000 0x0 0x400>, > + <0x0 0x093fe000 0x0 0x400>, > + <0x0 0x093ff000 0x0 0x400>, > + <0x0 0x09151000 0x0 0x20000>, > + <0x0 0x09171000 0x0 0x20000>, > + <0x0 0x09191000 0x0 0x20000>, > + <0x0 0x092dc000 0x0 0x9000>, > + <0x0 0x092f0000 0x0 0x9000>; > + reg-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite0", > + "csid_lite1", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "csiphy4", > + "csiphy5", > + "csitpg0", > + "csitpg1", > + "csitpg2", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite0", > + "vfe_lite1"; > + > + clocks = <&camcc CAM_CC_CAMNOC_NRT_AXI_CLK>, > + <&camcc CAM_CC_CAMNOC_RT_AXI_CLK>, > + <&camcc CAM_CC_CAM_TOP_AHB_CLK>, > + <&camcc CAM_CC_CAM_TOP_FAST_AHB_CLK>, > + <&camcc CAM_CC_CAMNOC_RT_TFE_0_MAIN_CLK>, > + <&camcc CAM_CC_CAMNOC_RT_TFE_1_MAIN_CLK>, > + <&camcc CAM_CC_CAMNOC_RT_TFE_2_MAIN_CLK>, > + <&camcc CAM_CC_CAMNOC_RT_IFE_LITE_CLK>, > + <&camcc CAM_CC_CSID_CLK>, > + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, > + <&camcc CAM_CC_CSIPHY0_CLK>, > + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY1_CLK>, > + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY2_CLK>, > + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY3_CLK>, > + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY4_CLK>, > + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, > + <&camcc CAM_CC_CSIPHY5_CLK>, > + <&camcc CAM_CC_CSI5PHYTIMER_CLK>, > + <&gcc GCC_CAMERA_HF_AXI_CLK>, > + <&gcc GCC_CAMERA_SF_AXI_CLK>, > + <&camcc CAM_CC_TFE_0_MAIN_CLK>, > + <&camcc CAM_CC_TFE_0_MAIN_FAST_AHB_CLK>, > + <&camcc CAM_CC_TFE_1_MAIN_CLK>, > + <&camcc CAM_CC_TFE_1_MAIN_FAST_AHB_CLK>, > + <&camcc CAM_CC_TFE_2_MAIN_CLK>, > + <&camcc CAM_CC_TFE_2_MAIN_FAST_AHB_CLK>, > + <&camcc CAM_CC_IFE_LITE_CLK>, > + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, > + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, > + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, > + <&camcc CAM_CC_QDSS_DEBUG_XO_CLK>; > + clock-names = "camnoc_nrt_axi", > + "camnoc_rt_axi", > + "cpas_ahb", > + "cpas_fast_ahb", > + "cpas_vfe0", > + "cpas_vfe1", > + "cpas_vfe2", > + "cpas_vfe_lite", > + "csid", > + "csid_csiphy_rx", > + "csiphy0", > + "csiphy0_timer", > + "csiphy1", > + "csiphy1_timer", > + "csiphy2", > + "csiphy2_timer", > + "csiphy3", > + "csiphy3_timer", > + "csiphy4", > + "csiphy4_timer", > + "csiphy5", > + "csiphy5_timer", > + "gcc_axi_hf", > + "gcc_axi_sf", > + "vfe0", > + "vfe0_fast_ahb", > + "vfe1", > + "vfe1_fast_ahb", > + "vfe2", > + "vfe2_fast_ahb", > + "vfe_lite", > + "vfe_lite_ahb", > + "vfe_lite_cphy_rx", > + "vfe_lite_csid", > + "qdss_debug_xo"; > + > + interrupts = , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + , > + ; > + interrupt-names = "csid0", > + "csid1", > + "csid2", > + "csid_lite0", > + "csid_lite1", > + "csiphy0", > + "csiphy1", > + "csiphy2", > + "csiphy3", > + "csiphy4", > + "csiphy5", > + "vfe0", > + "vfe1", > + "vfe2", > + "vfe_lite0", > + "vfe_lite1"; > + > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY > + &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, > + <&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > + <&mmss_noc MASTER_CAMNOC_NRT_ICP_SF QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + interconnect-names = "ahb", > + "hf_mnoc", > + "sf_mnoc", > + "sf_icp_mnoc"; > + > + iommus = <&apps_smmu 0x1c00 0x00>; > + > + power-domains = <&camcc CAM_CC_TFE_0_GDSC>, > + <&camcc CAM_CC_TFE_1_GDSC>, > + <&camcc CAM_CC_TFE_2_GDSC>, > + <&camcc CAM_CC_TITAN_TOP_GDSC>; > + power-domain-names = "ife0", > + "ife1", > + "ife2", > + "top"; > + > + vdd-csiphy0-0p8-supply = <&vreg_0p8_supply>; > + vdd-csiphy0-1p2-supply = <&vreg_1p2_supply>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + csiphy_ep0: endpoint { > + data-lanes = <0 1>; > + remote-endpoint = <&sensor_ep>; > + }; > + }; > + }; > + }; > + }; > Apart of the notice given above, the change looks good to me. Reviewed-by: Vladimir Zapolskiy -- Best wishes, Vladimir