From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC5C4350D64 for ; Wed, 19 Nov 2025 13:10:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763557840; cv=none; b=i0VnvyOLMq3u0xAI3RQDs1EfedskDi7YbzOJOfyjPiHZ/Fc+lPOcuB7YSLcKbnUUlkPqrFGwDlA7tjiXpq6f/7/6O1K8f1Gd6NhIHR4wi8VVqftWkEO4s+jRO5X1Xs9ILsGOHAybRGn3ydd7bu4ZDkLnz7u7ISdFC4Kg7K3haxU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1763557840; c=relaxed/simple; bh=XrDLVF0hdBkV83ksSO/kiDKCKfNYl8BcFLfDLZf0ALk=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Vlv+D7LPmObwO//LJZSpLRFSVasW4AQbHV8q+bIUjnP6KUkcJXb9VBiFeNF29fm9A7ZEQJROEzahf4Ek3U/gPIVjPjbcG9paH6U6rfdVlL7vcP7GwqbQJMdxKBalYVn2p1jBkKHu2mFKrVEhcYY929rZ63r1Ub2j/345LkrTgvU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=dW1E7pra; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=DCrkhpUP; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="dW1E7pra"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="DCrkhpUP" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 5AJ7OvZW972473 for ; Wed, 19 Nov 2025 13:10:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 82wMIqlPGNNgih/lMY0DCJQqqS6YcUhjEj+rPxqlHpA=; b=dW1E7prav8zuTRjn h7SiYUoEwxnZ8RUsEdRdhahiDnMp1eM0lWbQ8TENAmlDL3d8otU5NEkFM/7Vs/rQ VH+3wWPqKW/9aTxsYwet1+z1/1CzrNUgpIg+jd0xyZlt8CfxRzSK3jnKuiLWZjCR 8IK5K2f5CvrpZdV/Uiq4k8hJ8brQL6vQLWNhxgCXqaGXNlcOneD7Gvsw8hya+b9D pge8e4mDxouQIXCtmASP8DIvNUJn8XnhEMF83sQEVHhp4PUyVBLpNjfIXyobDA/I LHX39R/kInmmUXXlUj6rAWC4LKrzmtV5kfHElP1/rGIlsMItwwJFbEWATf7fGPby BdhR1g== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4ah9fu9184-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 19 Nov 2025 13:10:38 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-3438b1220bcso7813737a91.2 for ; Wed, 19 Nov 2025 05:10:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1763557837; x=1764162637; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=82wMIqlPGNNgih/lMY0DCJQqqS6YcUhjEj+rPxqlHpA=; b=DCrkhpUPvWqbIxhr9HG2vS09KjLuiTkcYIAD8uD6rZuzSLqeJ5zuNtsmYxR6YWKrhU 2A7LTsyWzvIoDj2o3RoK4GLhuvaIHIWft/VV/0FfNY96dcIeObfj8dA0YCJ0mmJN8IZK 2IRj83/F2K2Mt+XOIHC38qNA72NVfNqylob2UIyU8TFydisUJ7PfFb8sccq5gC7Vuvbk okB13gT2F4vHRhKIDjueu7tFR63kWMBnfeg0GE6ypVeYw/H44WaqMb5OoBRjTBTL6mmi EbUfhJtyIRVJUjTx3R98r5wr+udOlzfn259J2p+/rPtPPCrKzvo0K716xt88p3ei6h+T mt0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1763557837; x=1764162637; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=82wMIqlPGNNgih/lMY0DCJQqqS6YcUhjEj+rPxqlHpA=; b=Da+1MiZcKdw6Ju0ZGZT7VQqJ/iJVCT4cNnoOWMSc12UH2cJg3CoX2HZ3mjqx0x9jN+ yOv5Bw4Th0cONW+snuNPjEmnK7slMBDqMd5jfCxf4dRvzJOlhJFe+XyCZ0rlNSyGk0Lj W/Id/yVCyJRt6hlbgoxZ1TyFtvHsRFTH6oiqxwt2W7uvZDLImV7tJpKWppFaKkCT+RmG GW4wmo27yuKJ5stbACMJtNzpwUkVhfCeDcy4hhnB3cAOSMsLfW6n+CiKb3TRuTGBdYnL cyO5xE2FaBSdPMFqHtf0JMnxv0DBgcoQLhcYHF2HNsgrrKWII2apX163/8G77ljjTOMp mzXg== X-Forwarded-Encrypted: i=1; AJvYcCWZhJX4MAFHfDqNM6O7KUejJsAWcGguIOA1mTy4pcyHUBaG4as7r77TzaCUX7zPenYaUdqU0GC3SrCmNi8=@vger.kernel.org X-Gm-Message-State: AOJu0Yzrjb9ugD5+dftXl50jNraYufU/GzKiSfN3ymRSVCCbpwf3920X 0+4KiQhux+B4qtSI8xr0t0Mj3UNo/4GCgmbcgiIg32LwUxIgvHmhgIfkLLgJq7B/gYNqD7oOI4K Bby8I9n8Jwhs5AuMeh7TacES0QObJ8OklxFIMJin6RraATTySfFFwFqGPc6esNxp0lZg= X-Gm-Gg: ASbGncvd9b2fxlhY2zaAhIJx/yPws931KF6VVc6mlG2vBr6PULe5V8n4mMrSgpK19ZT 6yjnhSF5MGp/vXh0KAlSBDAgK7U3OqiSGnCH02dxrcWCmXy9t6sq+HCzm+eFXgP7qeVdxlss5Ym eQtB5bBx30wAxlYqj4vPsqD0rWZM3C1gbxp3PUmGrTbIcdMrJTbDqeajiD3P0q0xVvO8hs0yNRH ISKaaAa/z0k08I4M/caRReuhaJcmylsHxGy7INcyK4HB+ZKhDZ22VjNSTlWmTGqlv0+6IdD6IM0 RM8CkRAHREz/zWLbZ2BF2J5bggjjm9ZYUpUaeBZiqOWxrXTM7cyWesg7SmLArp5c6ACoel2SEmC twu0/WG6JY0xj/llZRDgTn9yXjnL/bCR09VWpQ9YvuJ9ogA== X-Received: by 2002:a17:90b:43:b0:321:9366:5865 with SMTP id 98e67ed59e1d1-343fa74be1fmr20991250a91.33.1763557837197; Wed, 19 Nov 2025 05:10:37 -0800 (PST) X-Google-Smtp-Source: AGHT+IEfLnU9udBZsj27CHa3Apm+yWyXzude/KlvIWUon4gLSj1GOLNmMt3duV3KJHFp8HIDrx3baQ== X-Received: by 2002:a17:90b:43:b0:321:9366:5865 with SMTP id 98e67ed59e1d1-343fa74be1fmr20991223a91.33.1763557836591; Wed, 19 Nov 2025 05:10:36 -0800 (PST) Received: from [10.217.198.130] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7b9251ca3e9sm19787700b3a.29.2025.11.19.05.10.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Nov 2025 05:10:36 -0800 (PST) Message-ID: Date: Wed, 19 Nov 2025 18:40:31 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 21/24] arm64: dts: qcom: glymur: Enable tsens and thermal zone nodes To: Konrad Dybcio , Pankaj Patil , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250925-v3_glymur_introduction-v1-0-24b601bbecc0@oss.qualcomm.com> <20250925-v3_glymur_introduction-v1-21-24b601bbecc0@oss.qualcomm.com> <86492536-c14d-422c-add1-a6c60a7cb2e0@oss.qualcomm.com> Content-Language: en-US From: Manaf Meethalavalappu Pallikunhi In-Reply-To: <86492536-c14d-422c-add1-a6c60a7cb2e0@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE5MDEwNCBTYWx0ZWRfXzPn5jKnDlHo/ TAJ6MyRuJF9mjK7JUMInY2CRD3ooRjwmGAjPkrzVRYLrpmdoxLntCNo4N3AKEhQuiAPyiSxiEOJ 5LRuopXpu6/XVM6P5PSAoRJtXwdePJ/HzuFA1XQoIQeA0pZwBE220C3cWmW6oxK19IwCZnWtE6O 1xsZhnjq093qKhXTv0x/mGtL+FOkiuT5mfIbZ2crwyuYqUUQoqbu8GtgkgkCeKXCyMZSk0Jbx8J a5widSmx+Dq9bJ2jyehty+WKwzNgbmmWEfyG93SXC1vcrCMLBOuDaBZPcFF6h8FS/P8z175faYd RUsB1R+tE1yrvptdA5MZ1i9TVsIXxAqiwU8BgajREYsEDYFTLqbnR2AFgG+BhEzJ3/U9jKRkN3E t/kEwiQnYF+WbAzqN2b14twTq97WBw== X-Authority-Analysis: v=2.4 cv=KZTfcAYD c=1 sm=1 tr=0 ts=691dc1ce cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=1UUbX536_rBP94QpSC8A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: CwIInPAO7MFasCpXoILMnE7WRifWGHr6 X-Proofpoint-GUID: CwIInPAO7MFasCpXoILMnE7WRifWGHr6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-19_04,2025-11-18_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1011 suspectscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 phishscore=0 priorityscore=1501 malwarescore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511190104 Hi Konrad, On 9/25/2025 4:45 PM, Konrad Dybcio wrote: > On 9/25/25 8:32 AM, Pankaj Patil wrote: >> From: Manaf Meethalavalappu Pallikunhi >> >> Add tsens and thermal zones nodes for Glymur SoC. >> >> Signed-off-by: Manaf Meethalavalappu Pallikunhi >> Signed-off-by: Pankaj Patil >> --- >> arch/arm64/boot/dts/qcom/glymur.dtsi | 1998 ++++++++++++++++++++++++++++++++++ >> 1 file changed, 1998 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi >> index 17a07d33b9396dba00e61a3b4260fa1a535600f2..986dc385200029071136068ab79ff8dd66d5284a 100644 >> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi >> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi >> @@ -2790,6 +2790,134 @@ pdc: interrupt-controller@b220000 { >> interrupt-controller; >> }; >> >> + tsens0: thermal-sensor@c22c000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c22c000 0 0x1000>, /* TM */ >> + <0 0x0c222000 0 0x1000>; /* SROT */ > These comments are not useful > > I noticed that some patches use reg = <0x0, while others use reg = <0 > > please unify them for the former I will update in next revision > >> + >> + interrupts = , > pdc 26 We don't have any usecase to enable it as pdc interrupt and don't want to wake up from sleep as it is already in lowest power mode. > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <13>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens1: thermal-sensor@c22d000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c22d000 0 0x1000>, /* TM */ >> + <0 0x0c223000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 27 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <9>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens2: thermal-sensor@c22e000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c22e000 0 0x1000>, /* TM */ >> + <0 0x0c224000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 28 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <13>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens3: thermal-sensor@c22f000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c22f000 0 0x1000>, /* TM */ >> + <0 0x0c225000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 29 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <8>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens4: thermal-sensor@c230000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c230000 0 0x1000>, /* TM */ >> + <0 0x0c226000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 46 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <13>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens5: thermal-sensor@c231000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c231000 0 0x1000>, /* TM */ >> + <0 0x0c227000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 108 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <8>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens6: thermal-sensor@c232000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c232000 0 0x1000>, /* TM */ >> + <0 0x0c228000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 109 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <13>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> + tsens7: thermal-sensor@c233000 { >> + compatible = "qcom,glymur-tsens", "qcom,tsens-v2"; >> + reg = <0 0x0c233000 0 0x1000>, /* TM */ >> + <0 0x0c229000 0 0x1000>; /* SROT */ >> + >> + interrupts = , > pdc 110 > >> + ; >> + >> + interrupt-names = "uplow", >> + "critical"; >> + >> + #qcom,sensors = <15>; >> + >> + #thermal-sensor-cells = <1>; >> + }; >> + >> aoss_qmp: power-management@c300000 { >> compatible = "qcom,glymur-aoss-qmp", "qcom,aoss-qmp"; >> reg = <0 0x0c300000 0 0x400>; >> @@ -4611,4 +4739,1874 @@ timer { >> , >> ; >> }; >> + >> + thermal_zones: thermal-zones { >> + aoss-0-thermal { >> + thermal-sensors = <&tsens0 0>; > You need one more \t here > >> + trips { >> + trip-point0 { >> + temperature = <90000>; >> + hysteresis = <5000>; >> + type = "hot"; >> + }; >> + aoss-0-critical { > Please keep a \n between subnodes and between the last property and > following subnodes I will update in next revision > > >> + temperature = <110000>; >> + hysteresis = <0>; >> + type = "critical"; >> + }; >> + }; >> + }; >> + >> + cpu-0-0-0-thermal { >> + thermal-sensors = <&tsens0 1>; >> + >> + trips { >> + trip-point0 { >> + temperature = <90000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; >> + >> + trip-point1 { >> + temperature = <95000>; >> + hysteresis = <5000>; >> + type = "passive"; >> + }; > See: > > 06eadce93697 ("arm64: dts: qcom: x1e80100: Drop unused passive thermal trip points for CPU") > > It also only makes sense to keep "hot" trips for devices where we > can actually apply some cooling (e.g. the GPU) I will update in next revision Thank you Manaf > > Konrad