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Mon, 26 Oct 2026 12:14:37 -0700 (PDT) Received: from server.roeck-us.net ([2600:1700:e321:62f0:da43:aeff:fecc:bfd5]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-369e8afd64fsm31480019eec.0.2026.10.26.12.14.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Oct 2026 12:14:36 -0700 (PDT) Sender: Guenter Roeck Date: Mon, 26 Oct 2026 12:14:36 -0700 From: Guenter Roeck To: Hamza Mahfooz Cc: linux-hwmon@vger.kernel.org, Jonathan Corbet , Randy Dunlap , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/2] hwmon: (nct6683) Add fan control support for MSI boards with NCT6687D-R Message-ID: References: <20261004153250.516730-1-someguy@effective-light.com> <20261004153250.516730-3-someguy@effective-light.com> X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20261004153250.516730-3-someguy@effective-light.com> On Sun, Oct 04, 2026 at 11:32:50AM -0400, Hamza Mahfooz wrote: > The fan control registers of the NCT6687D-R used on recent MSI boards > (customer ID 0x20d) differ from the ones used on Mitac boards, and > changes must be made in a configuration phase of its fan engine. > > Add fan control support for these boards, based on a reverse engineered > register map: > > - Manual mode is selected with bit (channel % 8) of register 0xa00 > (channels 0-7) or 0x80f (channels 8-15). In manual mode, the duty > cycle is set with register (0xa28 + channel) (channels 0-7) or > (0x260 + channel - 10) (channels 10-15). Otherwise, the fan curve > configured by the BIOS is used. > - A configuration phase is requested by setting bit 7 of register > 0xa01, and is entered once register 0xcf8 reports that the fan > registers are unlocked. It is completed by setting bit 6 of register > 0xa01, after which the EC checks the new configuration, locks the > registers again and reports whether the configuration was accepted. > > Fan control is supported for the CPU (channel 0), pump (channel 1) and > system fan (channels 10-15) headers. Add pwmN_enable attributes for > them, with 1 selecting manual and 2 automatic mode, and make pwmN > writable in manual mode. The behaviour of the driver does not change > unless pwmN or pwmN_enable is written. > > Signed-off-by: Hamza Mahfooz Applied. Thanks, Guenter