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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nKgbbufNg7YLamrYvPT9m6c36GTC8TUQVz6wMmfshNLXPjzw2AeNkn1FuF2RffV0YryHVrvNNFE8NK1OeFS6id33Vr/FLaVwi8sbxRO2iX41y+jUK7PIxvnAwfpkrq+UHZdFiIRmATpInz8rnOjeBARv11gRkEP0/gGl7mKWaSui94AP464o2id0NDgR5M6rgKm1uUtJiehk4CjZc38ZC4YQRHyu/ISde92fKdxQKaQlBn2xo1ST5ILO2lHWtlnfyPGnfsRv40PJsDbe4dwKhMUDKu0yfV3RgTZM1Czr49kolc1gfxYYJeSl3VNFq+CwRDv6Nk7R5OSuhvk/H53QJWNRD6Ecg+lmw1FohaZFaeH1A3f+sN2Kv+vSxVhFE7A9+HFHztlm4nuFDpjuUaME84GONxX+MYeCJ4ze5AwcdyCU2yGkB0eVdRPnItZOlKhK X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2026 09:55:32.8571 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d0018668-bb08-4719-1d39-08de840b5476 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.59];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: DU6PEPF0000B621.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR10MB6401 On 3/17/26 10:24, Niklas Cassel wrote: > On Tue, Mar 17, 2026 at 10:13:52AM +0100, Christian Bruel wrote: >> >> Tested-by: Christian Bruel >> >> with the DISABLE BAR dependency >> https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=endpoint&id=33642e9e36dc084e4fc9245a266c9843bc8303b9 >> >> I will need to update the pci_epc_features after the merge. > > I don't think you should update pci_epc_features just to be able to test > the inbound submapping feature. > > As I said before, I think a better option would to ensure that the test is > skipped instead of returning failure, for SoCs with too few inbound iATUs. So we will need to add a SKIP ENOSPC case in TEST_F(pci_ep_bar, BAR_SUBRANGE_TEST) Note this will be equivalent to set .subrange_mapping to false in the pci_epc_features. But I agree, it only pertains to the epf test driver, not all epf drivers. Touching pci_epc_features is not a good idea > > A real EPF driver (not the test driver), that wants to run on STM32, and > wants to use inbound submapping feature, can simply ensure that it does not > enable all BARs (the test driver obviously enables all BARs, since it wants > to test all BARs). That way, that EPF driver will be able to use multiple > iATUs for a single BAR (as required by this new feature). > > This works because all BARs are disabled by default. An EPF driver has to > enable the BARs it wants to use. (E.g. nvmet-pci-epf only enables BAR0.) > > >> >> A more general question: I don't understand why only the STM32 is impacted. >> It seems that all targets, even those with 6 IB iATU entries, should ensure >> that one BAR is disabled to handle subranges. > > I can't speak for every SoC, but looking at dmesg: > rockchip-dw-pcie a40000000.pcie-ep: iATU: unroll T, 16 ob, 16 ib, align 64K, limit 8G > > rk3588 has 16 inbound windows. > > Probably most SoCs have more than 6 ib windows? Yes, probably, thank you Cheers Christian > > > Kind regards, > Niklas