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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Vincent Guittot <vincent.guittot@linaro.org>,
	chester62515@gmail.com, mbrugger@suse.com,
	ghennadi.procopciuc@oss.nxp.com, s32@nxp.com,
	lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	Ionut.Vicovan@nxp.com, larisa.grigore@nxp.com,
	Ghennadi.Procopciuc@nxp.com, ciprianmarian.costea@nxp.com,
	bogdan.hamciuc@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/4] pcie: s32g: Add initial PCIe support (RC)
Date: Sun, 14 Sep 2025 12:15:12 +0200	[thread overview]
Message-ID: <c3449621-546d-4911-9692-a465c6fa9697@kernel.org> (raw)
In-Reply-To: <20250912141436.2347852-4-vincent.guittot@linaro.org>

On 12/09/2025 16:14, Vincent Guittot wrote:
> +
> +static u64 s32g_get_coherency_boundary(struct device *dev)
> +{
> +	struct device_node *np;
> +	struct resource res;
> +
> +	np = of_find_node_by_type(NULL, "memory");

You leak OF node.

> +
> +	if (of_address_to_resource(np, 0, &res)) {
> +		dev_warn(dev, "Fail to get coherency boundary\n");
> +		return 0;
> +	}
> +
> +	return res.start;
> +}



...


> +
> +static struct platform_driver s32g_pcie_driver = {
> +	.driver = {
> +		.name	= "s32g-pcie",
> +		.owner	= THIS_MODULE,

That 12-yo code. My litmus test from last talk...

Please clean it up from such old coding style. BTW, tools are reporting
this since years (in this case coccinelle), so be sure that you actually
run standard static checks on new driver code (smatch, sparse, coccinelle).


Best regards,
Krzysztof

  parent reply	other threads:[~2025-09-14 10:15 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-12 14:14 [PATCH 0/4] pcie: s32g: Add support for PCIe controller Vincent Guittot
2025-09-12 14:14 ` [PATCH 1/4] dt-bindings: pcie: Add the NXP " Vincent Guittot
2025-09-12 20:50   ` Frank Li
2025-09-14 12:34     ` Vincent Guittot
2025-09-12 22:50   ` Bjorn Helgaas
2025-09-14 12:35     ` Vincent Guittot
2025-09-16  8:10       ` Vincent Guittot
2025-09-16 14:23         ` Bjorn Helgaas
2025-09-17 17:11           ` Manivannan Sadhasivam
2025-09-17 21:28             ` Bjorn Helgaas
2025-09-18  9:54               ` Vincent Guittot
2025-09-18 11:27               ` Manivannan Sadhasivam
2025-09-17  8:42   ` Niklas Cassel
2025-09-17 17:21     ` Vincent Guittot
2025-09-17 21:18   ` Bjorn Helgaas
2025-09-18  5:55     ` Vincent Guittot
2025-09-12 14:14 ` [PATCH 2/4] pcie: s32g: Add Phy clock definition Vincent Guittot
2025-09-12 22:18   ` Bjorn Helgaas
2025-09-14 12:36     ` Vincent Guittot
2025-09-12 14:14 ` [PATCH 3/4] pcie: s32g: Add initial PCIe support (RC) Vincent Guittot
2025-09-12 21:30   ` Frank Li
2025-09-14 12:43     ` Vincent Guittot
2025-09-12 23:02   ` Bjorn Helgaas
2025-09-14 12:44     ` Vincent Guittot
2025-09-14 10:15   ` Krzysztof Kozlowski [this message]
2025-09-14 12:45     ` Vincent Guittot
2025-09-12 14:14 ` [PATCH 4/4] MAINTAINERS: Add MAINTAINER for NXP S32G PCIe driver Vincent Guittot
2025-09-12 20:52   ` Frank Li

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