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From: Jiwei Sun <sjiwei@163.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: ilpo.jarvinen@linux.intel.com,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	helgaas@kernel.org, lukas@wunner.de, ahuang12@lenovo.com,
	sunjw10@lenovo.com, jiwei.sun.bj@qq.com, sunjw10@outlook.com
Subject: Re: [PATCH v3 1/2] PCI: Fix the wrong reading of register fields
Date: Wed, 22 Jan 2025 21:07:04 +0800	[thread overview]
Message-ID: <c366fa2f-753c-4123-ac6a-cc28b39f3217@163.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2501221247290.27203@angie.orcam.me.uk>



On 1/22/25 20:53, Maciej W. Rozycki wrote:
>> The macro PCIE_LNKCTL2_TLS2SPEED() and PCIE_LNKCAP_SLS2SPEED() just use
>> the link speed field of the registers. However, there are many other
>> different function fields in the Link Control 2 Register or the Link
>> Capabilities Register. If the register value is directly used by the two
>> macros, it may cause getting an error link speed value (PCI_SPEED_UNKNOWN).
> 
>  The change proposed seems right to me, however...
> 
>> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
>> index 2e40fc63ba31..c571f5943f3d 100644
>> --- a/drivers/pci/pci.h
>> +++ b/drivers/pci/pci.h
>> @@ -337,12 +337,14 @@ void pci_bus_put(struct pci_bus *bus);
>>  
>>  #define PCIE_LNKCAP_SLS2SPEED(lnkcap)					\
>>  ({									\
>> -	((lnkcap) == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT :	\
>> -	 (lnkcap) == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT :	\
>> -	 (lnkcap) == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT :	\
>> -	 (lnkcap) == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT :	\
>> -	 (lnkcap) == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT :	\
>> -	 (lnkcap) == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT :	\
>> +	u32 __lnkcap = (lnkcap) & PCI_EXP_LNKCAP_SLS;			\
>> +									\
>> +	(__lnkcap == PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT :	\
>> +	 __lnkcap == PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT :	\
>> +	 __lnkcap == PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT :	\
>> +	 __lnkcap == PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT :	\
>> +	 __lnkcap == PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT :	\
>> +	 __lnkcap == PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT :	\
> 
>  ... wouldn't it make sense to give the intermediate variable a meaningful 
> name reflecting data it carries, e.g. `lnkcap_sls'?

This is a good idea. I will modify the patch in the v4 patch.

Thanks,
Regards,
Jiwei


  reply	other threads:[~2025-01-22 13:09 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-22  8:06 [PATCH v3 0/2] Fix the issue of failed speed limit lifting Jiwei Sun
2025-01-22  8:06 ` [PATCH v3 1/2] PCI: Fix the wrong reading of register fields Jiwei Sun
2025-01-22 12:53   ` Maciej W. Rozycki
2025-01-22 13:07     ` Jiwei Sun [this message]
2025-01-22  8:06 ` [PATCH v3 2/2] PCI: Adjust the position of reading the Link Control 2 register Jiwei Sun

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