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From: Leon Woestenberg <leon.woestenberg@gmail.com>
To: "Scott D. Davilla" <davilla@4pi.com>
Cc: jarod@wilsonet.com,
	"Naren (Narendra) Sankar" <nsankar@broadcom.com>,
	"hancockrwd@gmail.com" <hancockrwd@gmail.com>,
	"jarod@redhat.com" <jarod@redhat.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"abraham.manu@gmail.com" <abraham.manu@gmail.com>
Subject: Re: CrystalHD driver safe on big endian systems?
Date: Mon, 22 Mar 2010 12:32:25 +0100	[thread overview]
Message-ID: <c384c5ea1003220432i78883b0fof64f3ffa666a0776@mail.gmail.com> (raw)
In-Reply-To: <p06240805c7cc98bdf217@192.168.9.6>

Hello Scott and others,

On Mon, Mar 22, 2010 at 4:53 AM, Scott D. Davilla <davilla@4pi.com> wrote:
>
> <..> From what I've seen in code, it looks definite little endian based and would need
> a look over regarding byte swap.
>
What parts of the code assumes little endian from what you've seen?

Now, byte swap endianess is one thing, C bitfields in combination with
it, another. I have given it a first shot here (mailer unsuitable for
sending patches), still failed on PowerPC:
http://www.sidebranch.com/crystalhd/

May I suggest we instrument all register access functions with a
printk() of the register being written? Then I can compare little
endian access patterns with big endian, to be sure we get the
bitfields, code assumptions and byte swap correctly.

Regards,
-- 
Leon

      parent reply	other threads:[~2010-03-22 11:32 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-21 21:03 Leon Woestenberg
2010-03-22  3:53 ` Scott D. Davilla
     [not found] ` <p06240805c7cc98bdf217@192.168.9.6>
2010-03-22 11:32   ` Leon Woestenberg [this message]

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