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Wed, 14 Jul 2021 17:59:04 +0000 Received: from [10.26.49.10] (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 14 Jul 2021 17:59:00 +0000 Subject: Re: [PATCH v8 2/9] clk: tegra: Fix refcounting of gate clocks To: Dmitry Osipenko , Thierry Reding , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , =?UTF-8?B?TWljaGHFgiBNaXJvc8WCYXc=?= CC: Rob Herring , , , , References: <20210516163041.12818-1-digetx@gmail.com> <20210516163041.12818-3-digetx@gmail.com> From: Jon Hunter Message-ID: Date: Wed, 14 Jul 2021 18:58:58 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cb53a789-53a5-460e-4dca-08d946f111a2 X-MS-TrafficTypeDiagnostic: BN6PR12MB1698: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Jul 2021 17:59:04.4578 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cb53a789-53a5-460e-4dca-08d946f111a2 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT022.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1698 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 14/07/2021 12:59, Dmitry Osipenko wrote: > 14.07.2021 14:48, Jon Hunter пишет: >> >> On 16/05/2021 17:30, Dmitry Osipenko wrote: >>> The refcounting of the gate clocks has a bug causing the enable_refcnt >>> to underflow when unused clocks are disabled. This happens because clk >>> provider erroneously bumps the refcount if clock is enabled at a boot >>> time, which it shouldn't be doing, and it does this only for the gate >>> clocks, while peripheral clocks are using the same gate ops and the >>> peripheral clocks are missing the initial bump. Hence the refcount of >>> the peripheral clocks is 0 when unused clocks are disabled and then the >>> counter is decremented further by the gate ops, causing the integer >>> underflow. >>> >>> Fix this problem by removing the erroneous bump and by implementing the >>> disable_unused() callback, which disables the unused gates properly. >>> >>> The visible effect of the bug is such that the unused clocks are never >>> gated if a loaded kernel module grabs the unused clocks and starts to use >>> them. In practice this shouldn't cause any real problems for the drivers >>> and boards supported by the kernel today. >>> >>> Acked-by: Thierry Reding >>> Signed-off-by: Dmitry Osipenko ... > Seems you'll need to implement the disable_unused() callback for the > clk_sdmmc_mux to fix it. It's good that this problem has been caught. > > diff --git a/drivers/clk/tegra/clk-sdmmc-mux.c > b/drivers/clk/tegra/clk-sdmmc-mux.c > index 316912d3b1a4..4f2c3309eea4 100644 > --- a/drivers/clk/tegra/clk-sdmmc-mux.c > +++ b/drivers/clk/tegra/clk-sdmmc-mux.c > @@ -194,6 +194,15 @@ static void clk_sdmmc_mux_disable(struct clk_hw *hw) > gate_ops->disable(gate_hw); > } > > +static void clk_sdmmc_mux_disable_unused(struct clk_hw *hw) > +{ > + struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw); > + const struct clk_ops *gate_ops = sdmmc_mux->gate_ops; > + struct clk_hw *gate_hw = &sdmmc_mux->gate.hw; > + > + gate_ops->disable_unused(gate_hw); > +} > + > static void clk_sdmmc_mux_restore_context(struct clk_hw *hw) > { > struct clk_hw *parent = clk_hw_get_parent(hw); > @@ -218,6 +227,7 @@ static const struct clk_ops tegra_clk_sdmmc_mux_ops = { > .is_enabled = clk_sdmmc_mux_is_enabled, > .enable = clk_sdmmc_mux_enable, > .disable = clk_sdmmc_mux_disable, > + .disable_unused = clk_sdmmc_mux_disable_unused, > .restore_context = clk_sdmmc_mux_restore_context, > }; > Thanks, that fixes it! Please feel free to add my test-by and acked-by when you send out the patch. Acked-by: Jon Hunter Tested-by: Jon Hunter Cheers! Jon -- nvpublic