From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762134AbdAINjP (ORCPT ); Mon, 9 Jan 2017 08:39:15 -0500 Received: from mailout2.samsung.com ([203.254.224.25]:40366 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753251AbdAINjH (ORCPT ); Mon, 9 Jan 2017 08:39:07 -0500 X-AuditID: b6c32a28-f79866d000002812-0f-58739278985e Subject: Re: [PATCH V2 3/5] Documetation: binding: modify the exynos5440 pcie binding To: Jaehoon Chung , linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, kgene@kernel.org, krzk@kernel.org, kishon@ti.com, jingoohan1@gmail.com, vivek.gautam@codeaurora.org, pankaj.dubey@samsung.com, cpgs@samsung.com From: Alim Akhtar Message-id: Date: Mon, 09 Jan 2017 19:06:43 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1 MIME-version: 1.0 In-reply-to: <20170104123435.30740-4-jh80.chung@samsung.com> Content-type: text/plain; charset=windows-1252; format=flowed Content-transfer-encoding: 7bit X-Brightmail-Tracker: H4sIAAAAAAAAA01SbUxTZxTee29778Wt+loR3zSZkhtiRKXSppSXDdwMbN5Ep+gybVy27gZe aWO/1tsadWZpSIYTRLvtBy0QR6oY0lTBWuUjUfFKRDQbbdBIJBpFSPyIhASSbUbN2l5N+Pec 5zwn53lODkdrexgdZ3f5iNclOnhmkerS9cJVRQd+lyzFb5u1+HS9DT+TC/GfQ3+r8firBjXu mg+z+MSTFzROTh9j8OhoD4vHBtoZ/NfJYQaHRq9QuPNeisKRi/Ms/uXyEItv/tdHf75EiJ2M AWHseDMl9Lc+YIWOuF+IR48ywvFEFAjD472UMBdfWc3tIeU2ItYSbz5x1bhr7a66Cn7L19ZK a4m52FBkKMOlfL5LdJIKvmprddGXdkfaOp+/X3T401S1KEn8ho3lXrffR/JtbslXwX9rMBj1 huJSvdFo1JuM331iLElLfiC21NgrtSeZdyB5oRsEQEzbCHI4BE2ouT4KFJyHkg+7mUawiNPC ToBehwNAKeYAmkpNMe8nkn03aaXRA5B8vY/NNJbB3ehW/4yqEXBcLvwCtUQsGQ0Neyk0HRxU ZTQMXIcetCSoDNbAjehcUyy7WgUL0PRkW1azHFqQfGOCVjRL0Uh4KsvnwHIUkSNZnoab0Osn slrBq1Dvy/asIQSfsSj0NMpmTCD4MYoP0orpKjTYNvsu5jL0fDjBKliHRtoescrsEYAeBmfU ShEC6OjZl5Si+gwN3mlXKdsWo/ama5SyQIN+bXh3RwElW+bVCr0JJYeXKge6BtD9wAAbBCtb F+RpXZChdUGGDkBHQR7xSM46Ipk8WC+JTsnvqtPXuJ1xkP3WtWv6wGzHFhlADvAfaaq7vBat WtwvHXTKAHE0n6tZHZQsWk2tePAQ8bqtXr+DSDIoSd/4N1q3vMad/n2Xz2owmQ0mY5nZbC4r LuVXaO4HPrVoYZ3oI/sI8RDv+zmKy9EFQMH5KxWHtyUS60ea9tl0F3aMvQl317vWTG4fVf94 FxaO78ib37n5xky4iK+cY//xOFLBlKz65vb5U7HDXNWluatdtzv7LTm7cj/cG/rZ5H88cOh7 e4N18+yRgkoenvj3g9DidSsiVyfCzAQF7H+cph+Tr5aofhp6dOzy5PrEC5/xDK+SbKJhLe2V xP8BpyNObMMDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFIsWRmVeSWpSXmKPExsWSneMpo1s+qTjC4O9GU4slTRkWLw9pWsw/ co7V4savNlaLFV9mslv0P37NbHHhaQ+bxfnzG9gtLu+aw2Zxdt5xNosZ5/cxWSy9fpHJYtHW L+wWrXuPsFuc+LmD2YHfY828NYwel/t6mTx2zrrL7rFgU6nHplWdbB59W1Yxehy/sZ3J4/Mm uQCOKDebjNTElNQihdS85PyUzLx0W6XQEDddCyWFvMTcVFulCF3fkCAlhbLEnFIgz8gADTg4 B7gHK+nbJbhlXLz8i7XggljFhc3rGRsY1wh1MXJySAiYSFzYcYIZwhaTuHBvPVsXIxeHkMA6 RolXBy6zgySEBcIl1rxtZe1i5OAQEXCVmL4oAqLmIKPEhNNdjCAOs8B2JomT386CNbAJaEvc nb6FCcTmFbCTWNe9hhHEZhFQkXj6aDYLyCBRgQiJhsPpECWCEidnPmEBsTkFbCQWHVoEdhCz gK3Enbm7oWx5ie1v5zBPYOSfhaRlFpKyWUjKFjAyr2IUSy0ozk3PLS4wMNErTswtLs1L10vO z93ECIzXbYeVJHcwrlrhdYhRgINRiYc3YkJxhBBrYllxZe4hRgkOZiURXjWQEG9KYmVValF+ fFFpTmrxIUZToC8mMkuJJucDU0leSbyhiamFhYWJpbGxsYWJkjhv7PRn4UIC6YklqdmpqQWp RTB9TBycUg2MxvUVlskfO18s2JrcGLb4g8qu2W8Unmr/Piu9Onpdo52pVjirY0Hr/r82Vi/K dJ9kPtqQt2GO5L2kr76vzrFUJG1TnHp+x1/fxMKK3JbTtUstqi5Vr6uIXCPCLC0q8/a/9EyR co/1OnnNa6QeqDFI+YRdaRZYsfjFgxBus1mOAY/15ngd7FRSYinOSDTUYi4qTgQAbJzY5+0C AAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170109133903epcas4p1184be2f1efb0aefc9cd2ddd242949c2a X-Msg-Generator: CA X-Sender-IP: 182.195.34.25 X-Local-Sender: =?UTF-8?B?7JWM66a8G1NTSVItVHVybiBLZXkgU29sdXRpb25zG+yCvA==?= =?UTF-8?B?7ISx7KCE7J6QGy4vU2VuaW9yIENoaWVmIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?QUxJTSBBS0hUQVIbU1NJUi1UdXJuIEtleSBTb2x1dGlvbnMb?= =?UTF-8?B?U2Ftc3VuZyBFbGVjdHJvbmljcxsuL1NlbmlvciBDaGllZiBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG1NXQUhRG0MxMElEMDdJRDAxMDk5Nw==?= CMS-TYPE: 104P DLP-Filter: Pass X-CFilter-Loop: Reflected X-HopCount: 7 X-CMS-RootMailID: 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713 X-RootMTR: 20170104123436epcas1p1040f1e074748fabe58af52eb0b833713 References: <20170104123435.30740-1-jh80.chung@samsung.com> <20170104123435.30740-4-jh80.chung@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jaehoon, On 01/04/2017 06:04 PM, Jaehoon Chung wrote: > According to using PHY framework, updates the exynos5440-pcie binding. > For maintaining backward compatibility, leaves the current dt-binding. > (It should be deprecated.) > > Recommends to use the Phy Framework and "config" property to follow > the designware-pcie binding. > If you use the old way, can see "mssing *config* reg space" message. > Because the getting configuration space address from range is old way. > > NOTE: When use the "config" property, first name of 'reg-names' must be > set to "elbi". Otherwise driver can't maintain the backward capability. > > Signed-off-by: Jaehoon Chung > --- Reviewed-by: Alim Akhtar > Changelog on V2: > - Describes more commit message > - Fixes the typos > - Adds the new example for using PHY framework > - Deprecated the old dt-binding description > - Removes 'phy-names' > > .../bindings/pci/samsung,exynos5440-pcie.txt | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt > index 4f9d23d..1d0af0e 100644 > --- a/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/samsung,exynos5440-pcie.txt > @@ -7,8 +7,19 @@ Required properties: > - compatible: "samsung,exynos5440-pcie" > - reg: base addresses and lengths of the pcie controller, > the phy controller, additional register for the phy controller. > + (Registers for the phy controller are DEPRECATED. > + Use the PHY framework.) > +- reg-names : First name should be set to "elbi". > + And use the "config" instead of getting the confgiruation address space > + from "ranges". > + NOTE: When use the "config" property, reg-names must be set. > - interrupts: A list of interrupt outputs for level interrupt, > pulse interrupt, special interrupt. > +- phys: From PHY binding. Phandle for the Generic PHY. > + Refer to Documentation/devicetree/bindings/phy/samsung-phy.txt > + > +Other common properties refer to > + Documentation/devicetree/binding/pci/designware-pcie.txt > > Example: > > @@ -54,6 +65,24 @@ SoC specific DT Entry: > num-lanes = <4>; > }; > > +With using PHY framework: > + pcie_phy0: pcie-phy@270000 { > + ... > + reg = <0x270000 0x1000>, <0x271000 0x40>; > + regn-names = "phy", "block"; > + ... > + }; > + > + pcie@290000 { > + ... > + reg = <0x290000 0x1000>, <0x40000000 0x1000>; > + reg-names = "elbi", "config"; > + phys = <&pcie_phy0>; > + ranges = <0x81000000 0 0 0x60001000 0 0x00010000 > + 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; > + ... > + }; > + > Board specific DT Entry: > > pcie@290000 { >