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Wed, 28 Sep 2022 12:15:47 -0700 (PDT) Received: from [192.168.1.211] ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id r11-20020a056512102b00b0049d0a98f73csm548977lfr.154.2022.09.28.12.15.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Sep 2022 12:15:47 -0700 (PDT) Message-ID: Date: Wed, 28 Sep 2022 22:15:46 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH 07/13] phy: qcom-qmp-pcie: clean up power-down handling Content-Language: en-GB To: Johan Hovold , Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Kishon Vijay Abraham I , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220928152822.30687-1-johan+linaro@kernel.org> <20220928152822.30687-8-johan+linaro@kernel.org> From: Dmitry Baryshkov In-Reply-To: <20220928152822.30687-8-johan+linaro@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/09/2022 18:28, Johan Hovold wrote: > Always define the POWER_DOWN_CONTROL register instead of falling back to > the v2 offset during power on and power off. > > Signed-off-by: Johan Hovold > --- > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 20 ++++++-------------- > 1 file changed, 6 insertions(+), 14 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > index eea66c24cf7e..47cdb9ed80cd 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c > @@ -90,12 +90,14 @@ static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > [QPHY_SW_RESET] = 0x00, > [QPHY_START_CTRL] = 0x08, > [QPHY_PCS_STATUS] = 0x174, > + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, > }; Without symbolic names it's not obvious that 0x04 (and thus this regs_layout) can be used for v2 and v3, but not for v4. > > static const unsigned int sdm845_qhp_pciephy_regs_layout[QPHY_LAYOUT_SIZE] = { > [QPHY_SW_RESET] = 0x00, > [QPHY_START_CTRL] = 0x08, > [QPHY_PCS_STATUS] = 0x2ac, > + [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, > }; > > static const unsigned int sm8250_pcie_regs_layout[QPHY_LAYOUT_SIZE] = { > @@ -1872,13 +1874,8 @@ static int qmp_pcie_init(struct phy *phy) > if (ret) > goto err_assert_reset; > > - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) > - qphy_setbits(pcs, > - cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > - cfg->pwrdn_ctrl); > - else > - qphy_setbits(pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, > - cfg->pwrdn_ctrl); > + qphy_setbits(pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > + cfg->pwrdn_ctrl); > > return 0; > > @@ -1995,13 +1992,8 @@ static int qmp_pcie_power_off(struct phy *phy) > qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); > > /* Put PHY into POWER DOWN state: active low */ > - if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) { > - qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > - cfg->pwrdn_ctrl); > - } else { > - qphy_clrbits(qphy->pcs, QPHY_V2_PCS_POWER_DOWN_CONTROL, > - cfg->pwrdn_ctrl); > - } > + qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], > + cfg->pwrdn_ctrl); > > return 0; > } -- With best wishes Dmitry