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Mon, 24 Jul 2023 19:05:54 GMT Received: from [10.134.65.165] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Mon, 24 Jul 2023 12:05:54 -0700 Message-ID: Date: Mon, 24 Jul 2023 12:05:54 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH V5 1/3] firmware: qcom_scm: provide a read-modify-write function Content-Language: en-US To: Kathiravan T , Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , "Mukesh Ojha" , Kalle Valo , Loic Poulain , , , CC: , , , , Srinivas Kandagatla References: <20230720070408.1093698-1-quic_kathirav@quicinc.com> <20230720070408.1093698-2-quic_kathirav@quicinc.com> From: Elliot Berman In-Reply-To: <20230720070408.1093698-2-quic_kathirav@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SyZz-8N0IQ_YZPDQ-3VEN98z-z9nFdTu X-Proofpoint-GUID: SyZz-8N0IQ_YZPDQ-3VEN98z-z9nFdTu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-24_14,2023-07-24_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 priorityscore=1501 mlxlogscore=800 lowpriorityscore=0 impostorscore=0 mlxscore=0 spamscore=0 adultscore=0 phishscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2307240167 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 7/20/2023 12:04 AM, Kathiravan T wrote: > From: Mukesh Ojha > > It was realized by Srinivas K. that there is a need of read-modify-write > scm exported function so that it can be used by multiple clients. > > Let's introduce qcom_scm_io_update_field() which masks out the bits and > write the passed value to that bit-offset. > > Suggested-by: Srinivas Kandagatla > Signed-off-by: Mukesh Ojha > Signed-off-by: Kathiravan T After updating EXPORT_SYMBOL -> EXPORT_SYMBOL_GPL: Reviewed-by: Elliot Berman > --- > Changes in V5: > - No changes > > drivers/firmware/qcom_scm.c | 15 +++++++++++++++ > include/linux/firmware/qcom/qcom_scm.h | 2 ++ > 2 files changed, 17 insertions(+) > > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c > index fde33acd46b7..104d86e49b97 100644 > --- a/drivers/firmware/qcom_scm.c > +++ b/drivers/firmware/qcom_scm.c > @@ -407,6 +407,21 @@ int qcom_scm_set_remote_state(u32 state, u32 id) > } > EXPORT_SYMBOL(qcom_scm_set_remote_state); > > +int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, unsigned int val) > +{ > + unsigned int old, new; > + int ret; > + > + ret = qcom_scm_io_readl(addr, &old); > + if (ret) > + return ret; > + > + new = (old & ~mask) | (val & mask); > + > + return qcom_scm_io_writel(addr, new); > +} > +EXPORT_SYMBOL(qcom_scm_io_update_field); > + > static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) > { > struct qcom_scm_desc desc = { > diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h > index 250ea4efb7cb..ca41e4eb33ad 100644 > --- a/include/linux/firmware/qcom/qcom_scm.h > +++ b/include/linux/firmware/qcom/qcom_scm.h > @@ -84,6 +84,8 @@ extern bool qcom_scm_pas_supported(u32 peripheral); > > extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val); > extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val); > +extern int qcom_scm_io_update_field(phys_addr_t addr, unsigned int mask, > + unsigned int val); > > extern bool qcom_scm_restore_sec_cfg_available(void); > extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);