Re: [PATCH 1/1] MAINTAINERS: Add maintainer for NXP S32G boards

["Arnd Bergmann" <arnd@arndb.de>]

On Fri, Feb 23, 2024, at 13:02, Matthias Brugger wrote:
> On 22/02/2024 12:13, Krzysztof Kozlowski wrote:
>> On 21/02/2024 18:00, Ghennadi Procopciuc wrote:
>> 
>> Andreas or Matthias,
>> Maybe you could change your R: into M: and take s32g patches?
>> 
>> If not, then I will ack this patch making Ghennadi the maintainer.
>> 
>
> Normal process would be that Arnd would contact Chester to see if he is 
> not able 
> to do the maintainer work any more. In that case maybe Arnd could take 
> over.

I was hoping to see a reply from Chester one way or another,
I see he has been on Cc for the entire thread but not
chimed in.

> I'm not saying that Ghennadi won't be able to defend this, if it ever occurs. 
> Basically because I don't have a good track record of him due to missing 
> upstream collaboration.
>
> I would prefer that Arnd (or Andreas) step up to take the maintainer role. I 
> already have one and it's difficult for me to find the time to do it in an 
> acceptable way.

It appears that we already cover the dts files in the IMX
entry, whether that is intentional or not:

ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
M:      Shawn Guo <shawnguo@kernel.org>
M:      Sascha Hauer <s.hauer@pengutronix.de>
R:      Pengutronix Kernel Team <kernel@pengutronix.de>
R:      Fabio Estevam <festevam@gmail.com>
R:      NXP Linux Team <linux-imx@nxp.com> 
L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S:      Maintained
T:      git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
F:      arch/arm/boot/dts/nxp/imx/
F:      arch/arm/boot/dts/nxp/mxs/
F:      arch/arm64/boot/dts/freescale/

Added everyone there to Cc, having any s32 patches go through
the imx tree would be the easiest way as far as I'm concerned.
I've added the maintainers to Cc, let's see what they think.

I also noticed that the pinctrl driver entry still has Chester's
old email address listed as the only maintainer, so we should
probably fix that as well:

PIN CONTROLLER - NXP S32
M:      Chester Lin <clin@suse.com>
R:      NXP S32 Linux Team <s32@nxp.com>
L:      linux-gpio@vger.kernel.org
S:      Maintained
F:      Documentation/devicetree/bindings/pinctrl/nxp,s32*
F:      drivers/pinctrl/nxp/

       Arnd