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From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Kautuk Consul <kconsul@linux.vnet.ibm.com>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Nicholas Piggin <npiggin@gmail.com>,
	Rohan McLure <rmclure@linux.ibm.com>
Cc: "linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync
Date: Wed, 22 Feb 2023 09:43:19 +0000	[thread overview]
Message-ID: <c4dcf969-0836-cc78-63d9-db83b9ebfa1d@csgroup.eu> (raw)
In-Reply-To: <20230222090344.189270-1-kconsul@linux.vnet.ibm.com>



Le 22/02/2023 à 10:03, Kautuk Consul a écrit :
> A link from ibm.com states:
> "Ensures that all instructions preceding the call to __lwsync
>   complete before any subsequent store instructions can be executed
>   on the processor that executed the function. Also, it ensures that
>   all load instructions preceding the call to __lwsync complete before
>   any subsequent load instructions can be executed on the processor
>   that executed the function. This allows you to synchronize between
>   multiple processors with minimal performance impact, as __lwsync
>   does not wait for confirmation from each processor."
> 
> Thats why smp_rmb() and smp_wmb() are defined to lwsync.
> But this same understanding applies to parallel pipeline
> execution on each PowerPC processor.
> So, use the lwsync instruction for rmb() and wmb() on the PPC
> architectures that support it.
> 
> Signed-off-by: Kautuk Consul <kconsul@linux.vnet.ibm.com>

Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu>

> ---
>   arch/powerpc/include/asm/barrier.h | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
> index b95b666f0374..e088dacc0ee8 100644
> --- a/arch/powerpc/include/asm/barrier.h
> +++ b/arch/powerpc/include/asm/barrier.h
> @@ -36,8 +36,15 @@
>    * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
>    */
>   #define __mb()   __asm__ __volatile__ ("sync" : : : "memory")
> +
> +/* The sub-arch has lwsync. */
> +#if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC)
> +#define __rmb() __asm__ __volatile__ ("lwsync" : : : "memory")
> +#define __wmb() __asm__ __volatile__ ("lwsync" : : : "memory")

I'd have preferred with 'asm volatile' though.

> +#else
>   #define __rmb()  __asm__ __volatile__ ("sync" : : : "memory")
>   #define __wmb()  __asm__ __volatile__ ("sync" : : : "memory")
> +#endif
>   
>   /* The sub-arch has lwsync */
>   #if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC)

  parent reply	other threads:[~2023-02-22  9:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-22  9:03 Kautuk Consul
2023-02-22  9:30 ` Kautuk Consul
2023-02-22  9:44   ` Christophe Leroy
2023-02-22  9:49     ` Kautuk Consul
2023-02-22  9:43 ` Christophe Leroy [this message]
2023-02-22  9:46   ` Kautuk Consul
2023-02-22  9:51     ` Christophe Leroy
2023-02-22  9:55       ` Kautuk Consul
2023-02-22 17:47 ` Paul E. McKenney
2023-02-23  3:51   ` Michael Ellerman
2023-02-23  4:07     ` Kautuk Consul
2023-02-23  4:43     ` Kautuk Consul
2023-02-23  9:24       ` Michael Ellerman
2023-02-23  4:01   ` Kautuk Consul
2023-02-23  4:16     ` Paul E. McKenney
2023-02-23  4:22       ` Kautuk Consul

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